EPM7128AETC100-10 vs EPM7128AETC100-7N Vergleich
Detaillierter Direktvergleich von EPM7128AETC100-10 von Intel und EPM7128AETC100-7N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM7128AETC100-10 | EPM7128AETC100-7N |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $13,85 | $31,80 |
| Family | MAX 7000A | MAX 7000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD - Complex Programmable Logic Device |
| Macrocells | 128 | — |
| User I/Os | 84 | 84 |
| Usable Gates | 2.5K | 2,500 |
| Logic Array Blocks (LABs) | 8 | 4 |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Supply Voltage (Core) | 3.3 V | — |
| I/O Tolerance | 5.0 V tolerant | — |
| Program Technology | EEPROM (in-system programmable) | — |
| Gehäuse | 100-pin TQFP (ET) | 100-TQFP |
| Betriebstemperatur | -40C to +85C (commercial/industrial) | 0 C to +70 C (Commercial) |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| RoHS-Status | Compliant | [DATA_NEEDED: RoHS status] |
| Lebenszyklusstatus | Obsolete (migrate to MAX II or MAX V) | — |
| Macro Cells | — | 128 |
| Propagation Delay (tpd) | — | 7.5 ns |
| Counter Frequency (max) | — | 129.9 MHz |
| Internal Frequency (max) | — | 250 MHz |
| Core Supply Voltage | — | 3.3 V |
| Logic Family | — | CMOS |
| Pin-Anzahl | — | 100 |
| Montageart | — | Surface Mount |
| Programming Interface | — | JTAG (IEEE 1149.1) / ISP |
| Process Technology | — | 0.30 µm EEPROM CMOS |