EPM7128AETI100-7N vs EPM7128SQI100-10N Vergleich

Detaillierter Direktvergleich von EPM7128AETI100-7N von Altera und EPM7128SQI100-10N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EPM7128AETI100-7N EPM7128SQI100-10N
Marke Altera Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete NRND
Lagerstatus In Stock In Stock
Stückpreis (USD) $28,50 $15,90
Series MAX 7000A —
Family MAX 7000A CPLD MAX 7000S
Macro Cells 128 —
Number of Usable Gates 2,500 —
Number of I/O 84 —
Number of Logic Array Blocks (LABs) 8 —
Propagation Delay (tPD max) 7 ns —
Maximum Operating Frequency (fCNT) 129.9 MHz —
Supply Voltage (VCCINT) 3.0 V to 3.6 V —
I/O Bank Voltage (VCCIO) 2.5 V / 3.3 V / 5.0 V (multi-volt I/O) —
Process Technology CMOS EEPROM —
Gehäuse 100-pin TQFP (14x14 mm) 100-pin PQFP (Plastic Quad Flat Pack)
Montageart Surface Mount Surface Mount
Betriebstemperatur -40C to +85C (Industrial) -40C to +85C (Industrial grade, 'I' suffix)
In-System Programmability Yes (JTAG IEEE 1149.1) —
RoHS-Status Compliant —
Device Type — CPLD - Complex Programmable Logic Device
Macrocells — 128
Usable Gates — 2,500 (up to 5,000 usable in family)
Logic Array Blocks (LABs) — 4
Maximum User I/Os — 84
Pin-to-Pin Logic Delay (tPD) — 10 ns
Maximum Operating Frequency — 100 MHz
Counter Frequency (family max) — 175.4 MHz
Supply Voltage - Core (VCCINT) — 5.0 V
Supply Voltage - I/O (VCCIO) — 2.5 V / 3.3 V / 5.0 V (multiVolt)
Technology — CMOS, EEPROM-based configuration
Programming Interface — JTAG (IEEE Std. 1149.1) / ByteBlaster
RoHS Compliance — Compliant (lead-free, 'N' suffix)

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