EPM7128AETI100-7N vs EPM7128SQI100-10N 对比

详细并排对比 EPM7128AETI100-7N 出自 Altera 和 EPM7128SQI100-10N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM7128AETI100-7N EPM7128SQI100-10N
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $28.50 $15.90
Series MAX 7000A —
Family MAX 7000A CPLD MAX 7000S
Macro Cells 128 —
Number of Usable Gates 2,500 —
Number of I/O 84 —
Number of Logic Array Blocks (LABs) 8 —
Propagation Delay (tPD max) 7 ns —
Maximum Operating Frequency (fCNT) 129.9 MHz —
Supply Voltage (VCCINT) 3.0 V to 3.6 V —
I/O Bank Voltage (VCCIO) 2.5 V / 3.3 V / 5.0 V (multi-volt I/O) —
Process Technology CMOS EEPROM —
封装 100-pin TQFP (14x14 mm) 100-pin PQFP (Plastic Quad Flat Pack)
安装类型 Surface Mount Surface Mount
工作温度 -40C to +85C (Industrial) -40C to +85C (Industrial grade, 'I' suffix)
In-System Programmability Yes (JTAG IEEE 1149.1) —
RoHS 状态 Compliant —
Device Type — CPLD - Complex Programmable Logic Device
Macrocells — 128
Usable Gates — 2,500 (up to 5,000 usable in family)
Logic Array Blocks (LABs) — 4
Maximum User I/Os — 84
Pin-to-Pin Logic Delay (tPD) — 10 ns
Maximum Operating Frequency — 100 MHz
Counter Frequency (family max) — 175.4 MHz
Supply Voltage - Core (VCCINT) — 5.0 V
Supply Voltage - I/O (VCCIO) — 2.5 V / 3.3 V / 5.0 V (multiVolt)
Technology — CMOS, EEPROM-based configuration
Programming Interface — JTAG (IEEE Std. 1149.1) / ByteBlaster
RoHS Compliance — Compliant (lead-free, 'N' suffix)

数据手册与资源

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