EPM7128ATI100-10 vs EPM7128AETI100-7 Vergleich
Detaillierter Direktvergleich von EPM7128ATI100-10 von Altera und EPM7128AETI100-7 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EPM7128ATI100-10 - 128-Macrocell 10ns 3.3V CPLD | Altera MAX 7000A
EPM7128ATI100-10 ⚠ Letzte BestellmöglichkeitAltera
EPM7128AETI100-7 - MAX 7000A CPLD, 128 Macrocells, 100-TQFP | Altera
EPM7128AETI100-7 ObsoleteSpezifikationsvergleich
| Parameter | EPM7128ATI100-10 | EPM7128AETI100-7 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Letzte Kaufgelegenheit | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $13,85 | $30,10 |
| Series | MAX 7000A | — |
| Family | MAX 7000A (MAX II of MAX 7000 series) | MAX 7000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Programmable Type | EE PLD (EEPROM-based, in-system programmable) | — |
| Number of Macrocells | 128 | — |
| Number of Logic Array Blocks (LABs) | 4 | — |
| Usable Gates | 2,500 | 2,500 |
| Number of I/O Pins | 68 | — |
| Propagation Delay (tPD) | 10 ns | — |
| Maximum Frequency (fMAX) | 87 MHz | — |
| Supply Voltage (VCCINT) | 3.0 V to 3.6 V (3.3 V typical) | — |
| I/O Standard | MultiVolt (2.5V / 3.3V / 5.0V tolerant) | — |
| Programming Interface | IEEE Std. 1149.1 JTAG (ISP) | — |
| Betriebstemperatur | -40C to +85C (Industrial, 'I' suffix) | -40 C to +85 C (Industrial) |
| Gehäuse | 100-pin TQFP (14x14 mm) | 100-pin TQFP (1.0 mm pitch, 14 x 14 mm) |
| Process Technology | CMOS EEPROM | — |
| RoHS-Status | Non-compliant (legacy part) | [DATA_NEEDED: confirm RoHS for non-N suffix] |
| Montageart | Surface Mount | Surface Mount |
| Macrocells | — | 128 |
| User I/Os | — | 84 |
| Logic Blocks (LABs) | — | 8 |
| Pin-to-Pin Delay (tPD) | — | 7.5 ns |
| Maximum Counter Frequency | — | 129.9 MHz |
| Supply Voltage - Core (VCCINT) | — | 3.3 V |
| I/O Bank Supply (VCCIO) | — | 2.5 V / 3.3 V / 5 V (MultiVolt) |
| Configuration Memory | — | EEPROM (non-volatile, in-system programmable) |
| JTAG Support | — | Yes (IEEE 1149.1 boundary-scan) |
| Global Clock Inputs | — | 4 dedicated |
| Lead-Free Version (MPN Suffix) | — | -N suffix denotes lead-free (e.g., EPM7128AETI100-7N) |