EPM7128ATI100-10 vs EPM7128AETI100-7 Comparison
Detailed side-by-side comparison of EPM7128ATI100-10 by Altera and EPM7128AETI100-7 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM7128ATI100-10
EPM7128ATI100-10 - 128-Macrocell 10ns 3.3V CPLD | Altera MAX 7000A
EPM7128ATI100-10 β Last Time BuyAltera
EPM7128AETI100-7
EPM7128AETI100-7 - MAX 7000A CPLD, 128 Macrocells, 100-TQFP | Altera
EPM7128AETI100-7 ObsoleteSpecification Comparison
| Parameter | EPM7128ATI100-10 | EPM7128AETI100-7 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $13.85 | $30.10 |
| Series | MAX 7000A | β |
| Family | MAX 7000A (MAX II of MAX 7000 series) | MAX 7000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Programmable Type | EE PLD (EEPROM-based, in-system programmable) | β |
| Number of Macrocells | 128 | β |
| Number of Logic Array Blocks (LABs) | 4 | β |
| Usable Gates | 2,500 | 2,500 |
| Number of I/O Pins | 68 | β |
| Propagation Delay (tPD) | 10 ns | β |
| Maximum Frequency (fMAX) | 87 MHz | β |
| Supply Voltage (VCCINT) | 3.0 V to 3.6 V (3.3 V typical) | β |
| I/O Standard | MultiVolt (2.5V / 3.3V / 5.0V tolerant) | β |
| Programming Interface | IEEE Std. 1149.1 JTAG (ISP) | β |
| Operating Temperature | -40C to +85C (Industrial, 'I' suffix) | -40 C to +85 C (Industrial) |
| Package | 100-pin TQFP (14x14 mm) | 100-pin TQFP (1.0 mm pitch, 14 x 14 mm) |
| Process Technology | CMOS EEPROM | β |
| RoHS Status | Non-compliant (legacy part) | [DATA_NEEDED: confirm RoHS for non-N suffix] |
| Mounting Type | Surface Mount | Surface Mount |
| Macrocells | β | 128 |
| User I/Os | β | 84 |
| Logic Blocks (LABs) | β | 8 |
| Pin-to-Pin Delay (tPD) | β | 7.5 ns |
| Maximum Counter Frequency | β | 129.9 MHz |
| Supply Voltage - Core (VCCINT) | β | 3.3 V |
| I/O Bank Supply (VCCIO) | β | 2.5 V / 3.3 V / 5 V (MultiVolt) |
| Configuration Memory | β | EEPROM (non-volatile, in-system programmable) |
| JTAG Support | β | Yes (IEEE 1149.1 boundary-scan) |
| Global Clock Inputs | β | 4 dedicated |
| Lead-Free Version (MPN Suffix) | β | -N suffix denotes lead-free (e.g., EPM7128AETI100-7N) |