EPM7128ELC84-10 vs EPM7160SLC84-10 Vergleich
Detaillierter Direktvergleich von EPM7128ELC84-10 von Intel und EPM7160SLC84-10 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM7128ELC84-10 | EPM7160SLC84-10 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $7,20 | $35,77 |
| Family | MAX 7000 | MAX 7000S |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 128 | 160 |
| Equivalent Logic Gates | [DATA_NEEDED: equivalent gate count from datasheet] | — |
| User I/Os | 68 | — |
| Dedicated Inputs | 12 | — |
| Operating Voltage (VCCINT/VCClO) | 5 V | — |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Counter Frequency (fCNT) | [DATA_NEEDED: fCNT from datasheet] | — |
| Gehäuse | 84-pin PLCC (J-Lead) | 84-Pin PLCC (J-Lead) |
| Montageart | Surface Mount / Socket | Surface Mount |
| Betriebstemperatur | 0C to +70C (Commercial) | 0C to +70C (Commercial) |
| Technology | EEPROM-based CMOS | EEPROM-based CMOS |
| Programming Interface | IEEE 1149.1 (JTAG) ISP | — |
| In-System Programmable | Yes | — |
| RoHS-Status | [DATA_NEEDED: RoHS status from datasheet] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status from datasheet] | — |
| Logic Array Blocks (LABs) | — | 4 |
| Maximum User I/O Pins | — | 64 |
| Usable Gates | — | 3,200 |
| Propagation Delay (tPD) | — | 10 ns |
| Maximum Operating Frequency | — | 100 MHz |
| Supply Voltage (VCCINT/VCCIO) | — | 5.0 V |
| In-System Programmability | — | Yes (IEEE 1149.1 JTAG, 5.0 V) |
| JTAG Boundary Scan | — | Yes (IEEE Std. 1149.1 compliant) |