EPM7128ELC84-10 vs EPM7160SLC84-10 对比

详细并排对比 EPM7128ELC84-10 出自 Intel 和 EPM7160SLC84-10 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM7128ELC84-10 EPM7160SLC84-10
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 Obsolete
库存状态 有库存 有库存
单价(USD) $7.20 $35.77
Family MAX 7000 MAX 7000S
Device Type CPLD (Complex Programmable Logic Device) —
Macrocells 128 160
Equivalent Logic Gates [DATA_NEEDED: equivalent gate count from datasheet] —
User I/Os 68 —
Dedicated Inputs 12 —
Operating Voltage (VCCINT/VCClO) 5 V —
Pin-to-Pin Delay (tPD) 10 ns —
Counter Frequency (fCNT) [DATA_NEEDED: fCNT from datasheet] —
封装 84-pin PLCC (J-Lead) 84-Pin PLCC (J-Lead)
安装类型 Surface Mount / Socket Surface Mount
工作温度 0C to +70C (Commercial) 0C to +70C (Commercial)
Technology EEPROM-based CMOS EEPROM-based CMOS
Programming Interface IEEE 1149.1 (JTAG) ISP —
In-System Programmable Yes —
RoHS 状态 [DATA_NEEDED: RoHS status from datasheet] [DATA_NEEDED: RoHS status]
Lead-Free [DATA_NEEDED: lead-free status from datasheet] —
Logic Array Blocks (LABs) — 4
Maximum User I/O Pins — 64
Usable Gates — 3,200
Propagation Delay (tPD) — 10 ns
Maximum Operating Frequency — 100 MHz
Supply Voltage (VCCINT/VCCIO) — 5.0 V
In-System Programmability — Yes (IEEE 1149.1 JTAG, 5.0 V)
JTAG Boundary Scan — Yes (IEEE Std. 1149.1 compliant)

数据手册与资源

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