EPM7128ELC84-20 vs EPM7128ELC84-12 Vergleich
Detaillierter Direktvergleich von EPM7128ELC84-20 von Altera und EPM7128ELC84-12 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM7128ELC84-20 | EPM7128ELC84-12 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $24,20 | $10,40 |
| Series | MAX 7000 | — |
| Device Family | EPM7128 (CPLD) | — |
| Number of Macrocells | 128 | — |
| Number of Usable Gates | 2500 | — |
| Number of User I/Os | 68 | — |
| Number of Logic Array Blocks (LABs) | 8 | — |
| Propagation Delay (tPD) | 20 ns | — |
| Maximum Frequency (fCNT) | 62.5 MHz | — |
| Supply Voltage (VCC) | 5 V | — |
| Supply Voltage Tolerance | 4.75 V to 5.25 V | — |
| Technology | CMOS, EEPROM-based (non-volatile) | — |
| Programmable Interface | IEEE Std. 1149.1 (JTAG) | — |
| Package Type | PLCC-84 (J-Lead, J-bend) | — |
| Montageart | Surface Mount (PLCC socket compatible) | Surface Mount (PLCC socket compatible) |
| Betriebstemperatur | 0C to +70C (commercial) | 0C to +70C (commercial) |
| RoHS-Status | Contains lead (pre-RoHS, SnPb finish) | Non-compliant (legacy 5V part, SnPb finish) |
| Family | — | MAX 7000 (MAX 7000E series) |
| Logic Family | — | CMOS, EEPROM-based |
| Usable Gates | — | 2,500 |
| Macrocells | — | 128 |
| Logic Array Blocks (LABs) | — | 8 |
| User I/Os | — | 84 |
| Propagation Delay (tpd1) | — | 12 ns |
| Internal Global Clock Frequency | — | 90.9 MHz |
| Setup Time | — | 4.5 ns |
| Supply Voltage (VCCINT / VCCIO) | — | 5 V (4.75 V to 5.25 V) |
| Gehäuse | — | 84-pin PLCC (J-Lead, QCCJ) |
| Programming Interface | — | JTAG (IEEE 1149.1) / ISP |
| Pin-Anzahl | — | 84 |