EPM7128SLI84-10 vs EPM7128SLI84-10N Vergleich
Detaillierter Direktvergleich von EPM7128SLI84-10 von Altera und EPM7128SLI84-10N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EPM7128SLI84-10N - MAX 7000S CPLD 128 Macro 10ns 84-PLCC | Intel / Altera
EPM7128SLI84-10N NrndSpezifikationsvergleich
| Parameter | EPM7128SLI84-10 | EPM7128SLI84-10N |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $7,25 | $8,45 |
| Family | MAX 7000S | MAX 7000S |
| Usable Gates | 2.5K | 2,500 |
| Macro Cells | 128 | — |
| User I/Os | 68 | 68 |
| Logic Array Blocks (LABs) | 8 | — |
| Propagation Delay (tPD) | 10 ns | 10 ns |
| Internal Frequency | 100 MHz | — |
| Supply Voltage (VCCINT) | 5.0 V | 4.75 V to 5.25 V (5 V typical) |
| Configuration Memory | EEPROM (in-system programmable) | — |
| Betriebstemperatur | -40 °C to +85 °C (industrial) | -40 C to +85 C (Industrial) |
| Gehäuse | 84-pin PLCC | 84-pin PLCC (J-Lead) |
| Montageart | Surface Mount / Socket | Surface Mount |
| Process Technology | CMOS | CMOS EEPROM |
| JTAG Support | Yes (IEEE 1149.1) | — |
| RoHS-Status | [DATA_NEEDED: lead-free variant is -10N suffix] | [DATA_NEEDED: RoHS compliance per latest Intel/Altera declaration] |
| Logic Cells / Macro Cells | — | 128 macro cells |
| Number of Logic Elements / Blocks | — | 16 Logic Array Blocks (LABs) |
| Maximum Frequency (fMAX) | — | 125 MHz |
| I/O Voltage Tolerance | — | 3.3 V / 5 V MultiVolt I/O |
| Programmability | — | In-system programmable (ISP), non-volatile EEPROM |
| Boundary-Scan (JTAG) | — | IEEE Std 1149.1 compliant |
| Lead-Free | — | [DATA_NEEDED: lead-free per latest Intel/Altera declaration] |