EPM7128SLI84-10 vs EPM7128SLI84-10N 对比
详细并排对比 EPM7128SLI84-10 出自 Altera 和 EPM7128SLI84-10N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Altera
EPM7128SLI84-10N - MAX 7000S CPLD 128 Macro 10ns 84-PLCC | Intel / Altera
EPM7128SLI84-10N Nrnd规格对比
| 参数 | EPM7128SLI84-10 | EPM7128SLI84-10N |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $7.25 | $8.45 |
| Family | MAX 7000S | MAX 7000S |
| Usable Gates | 2.5K | 2,500 |
| Macro Cells | 128 | — |
| User I/Os | 68 | 68 |
| Logic Array Blocks (LABs) | 8 | — |
| Propagation Delay (tPD) | 10 ns | 10 ns |
| Internal Frequency | 100 MHz | — |
| Supply Voltage (VCCINT) | 5.0 V | 4.75 V to 5.25 V (5 V typical) |
| Configuration Memory | EEPROM (in-system programmable) | — |
| 工作温度 | -40 °C to +85 °C (industrial) | -40 C to +85 C (Industrial) |
| 封装 | 84-pin PLCC | 84-pin PLCC (J-Lead) |
| 安装类型 | Surface Mount / Socket | Surface Mount |
| Process Technology | CMOS | CMOS EEPROM |
| JTAG Support | Yes (IEEE 1149.1) | — |
| RoHS 状态 | [DATA_NEEDED: lead-free variant is -10N suffix] | [DATA_NEEDED: RoHS compliance per latest Intel/Altera declaration] |
| Logic Cells / Macro Cells | — | 128 macro cells |
| Number of Logic Elements / Blocks | — | 16 Logic Array Blocks (LABs) |
| Maximum Frequency (fMAX) | — | 125 MHz |
| I/O Voltage Tolerance | — | 3.3 V / 5 V MultiVolt I/O |
| Programmability | — | In-system programmable (ISP), non-volatile EEPROM |
| Boundary-Scan (JTAG) | — | IEEE Std 1149.1 compliant |
| Lead-Free | — | [DATA_NEEDED: lead-free per latest Intel/Altera declaration] |