EPM7128STC100-7 vs EPM7128STC100-6N Vergleich
Detaillierter Direktvergleich von EPM7128STC100-7 von Intel und EPM7128STC100-6N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EPM7128STC100-6N - MAX 7000S 128-Macro-Cell CPLD | Altera | TQFP-100
EPM7128STC100-6N ObsoleteSpezifikationsvergleich
| Parameter | EPM7128STC100-7 | EPM7128STC100-6N |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $8,20 | $10,50 |
| Series | MAX 7000S | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macro Cells | 128 | 128 |
| Usable Gates | 2,500 | 2,500 |
| Logic Array Blocks (LABs) | 8 | — |
| User I/Os | 84 | 84 |
| Propagation Delay (tPD) | 7.5 ns | 6 ns |
| Internal Frequency | 125 MHz | — |
| Supply Voltage (VCCINT) | 5 V | — |
| Logic Family | CMOS | CMOS |
| Programmable Pin Count | 100 | — |
| Gehäuse | 100-Pin TQFP (TQFP-100) | — |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperatur | 0C to +70C (Commercial) | 0C to +70C (Commercial) |
| In-System Programmability | Yes (JTAG IEEE 1149.1) | — |
| Configuration Memory | EEPROM (non-volatile) | — |
| RoHS-Status | [DATA_NEEDED: rohs status] | Non-Compliant (lead-bearing package) |
| Family | — | MAX 7000S |
| Anzahl der Pins | — | 100 |
| Package Type | — | TQFP-100 |
| Maximum Internal Frequency | — | 147.1 MHz |
| Internal Counter Frequency | — | 250 MHz |
| Pin-to-Pin Delay | — | 4.5 ns |
| Supply Voltage (VCCIO) | — | 5 V |
| Process Technology | — | CMOS EEPROM |
| Programmability | — | In-System Programmable (ISP) via JTAG |
| JTAG Support | — | IEEE 1149.1 Boundary Scan |