EPM7160SQC160-10 vs EPM7192SQC160-10 Vergleich
Detaillierter Direktvergleich von EPM7160SQC160-10 von Altera und EPM7192SQC160-10 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EPM7160SQC160-10 - MAX 7000S CPLD, 160 Macro Cells, 100MHz, PQFP-160 | Intel / Altera
EPM7160SQC160-10 ObsoleteAltera
EPM7192SQC160-10 - 192-Macro MAX 7000S CPLD, 100MHz, PQFP-160 | Intel / Altera
EPM7192SQC160-10 NrndSpezifikationsvergleich
| Parameter | EPM7160SQC160-10 | EPM7192SQC160-10 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $12,20 | $18,25 |
| Family | MAX 7000S | MAX 7000S |
| Macro Cells | 160 | — |
| Logic Elements / Gates | 3,200 usable gates | — |
| User I/Os | 104 | 124 |
| Logic Array Blocks (LABs) | 10 | 4 |
| Maximum Operating Frequency | 100 MHz | 100 MHz |
| Pin-to-Pin Propagation Delay (tPD) | 10 ns | — |
| Supply Voltage (VCCINT) | 5.0 V | 5.0 V |
| I/O Voltage Tolerance | 5.0 V | — |
| Programming Technology | EEPROM, in-system programmable | — |
| JTAG Support | IEEE 1149.1 (boundary-scan + ISP) | — |
| Gehäuse | PQFP-160 (SQC160) | PQFP-160 (SQC) 28x28 mm |
| Betriebstemperatur | 0 C to +70 C (commercial) | — |
| Logic Family | CMOS | — |
| Montageart | Surface Mount | — |
| Process Technology | CMOS, EEPROM-based | — |
| RoHS-Status | unknown | [DATA_NEEDED: RoHS status] |
| Lead-Free | unknown | — |
| Macrocells | — | 192 |
| Usable Gates | — | 3750 |
| Propagation Delay (tPD) | — | 10 ns |
| Program Memory Type | — | EEPROM |
| In-System Programmability | — | Yes (JTAG IEEE 1149.1) |
| Pin/Package Type | — | Surface Mount, Gull-Wing |
| Operating Temperature (Commercial) | — | 0C to +70C |
| Lead Finish | — | [DATA_NEEDED: lead finish] |