EPM7160SQC160-10 vs EPM7192SQC160-10 Comparaison
Comparaison détaillée côte à côte de EPM7160SQC160-10 par Altera et EPM7192SQC160-10 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EPM7160SQC160-10 - MAX 7000S CPLD, 160 Macro Cells, 100MHz, PQFP-160 | Intel / Altera
EPM7160SQC160-10 ObsoleteAltera
EPM7192SQC160-10 - 192-Macro MAX 7000S CPLD, 100MHz, PQFP-160 | Intel / Altera
EPM7192SQC160-10 NrndComparaison des spécifications
| Paramètre | EPM7160SQC160-10 | EPM7192SQC160-10 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $12,20 | $18,25 |
| Family | MAX 7000S | MAX 7000S |
| Macro Cells | 160 | — |
| Logic Elements / Gates | 3,200 usable gates | — |
| User I/Os | 104 | 124 |
| Logic Array Blocks (LABs) | 10 | 4 |
| Maximum Operating Frequency | 100 MHz | 100 MHz |
| Pin-to-Pin Propagation Delay (tPD) | 10 ns | — |
| Supply Voltage (VCCINT) | 5.0 V | 5.0 V |
| I/O Voltage Tolerance | 5.0 V | — |
| Programming Technology | EEPROM, in-system programmable | — |
| JTAG Support | IEEE 1149.1 (boundary-scan + ISP) | — |
| Boîtier | PQFP-160 (SQC160) | PQFP-160 (SQC) 28x28 mm |
| Température de fonctionnement | 0 C to +70 C (commercial) | — |
| Logic Family | CMOS | — |
| Type de montage | Surface Mount | — |
| Process Technology | CMOS, EEPROM-based | — |
| Statut RoHS | unknown | [DATA_NEEDED: RoHS status] |
| Lead-Free | unknown | — |
| Macrocells | — | 192 |
| Usable Gates | — | 3750 |
| Propagation Delay (tPD) | — | 10 ns |
| Program Memory Type | — | EEPROM |
| In-System Programmability | — | Yes (JTAG IEEE 1149.1) |
| Pin/Package Type | — | Surface Mount, Gull-Wing |
| Operating Temperature (Commercial) | — | 0C to +70C |
| Lead Finish | — | [DATA_NEEDED: lead finish] |