EPM7256AEFC100-7 vs EPM7256AETC100-10N Vergleich
Detaillierter Direktvergleich von EPM7256AEFC100-7 von Intel und EPM7256AETC100-10N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EPM7256AETC100-10N - 256-Macro MAX 7000A CPLD, 10ns, TQFP-100 | Intel (Altera)
EPM7256AETC100-10N ObsoleteSpezifikationsvergleich
| Parameter | EPM7256AEFC100-7 | EPM7256AETC100-10N |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $15,20 | $13,10 |
| Family | MAX 7000A | MAX 7000A |
| Macro Cells | 256 | 256 |
| Usable Gates | 5,000 | 5,000 |
| Logic Array Blocks | 16 | — |
| User I/Os | 84 | — |
| Gehäuse | 100-pin FBGA (11x11 mm) | 100-pin TQFP |
| Pin-Anzahl | 100 | — |
| Supply Voltage - VCCINT | 3.0 V to 3.6 V | — |
| Supply Voltage - VCCIO | 2.5 V, 3.3 V, or 5 V (MultiVolt) | — |
| Propagation Delay (tPD) | 7.5 ns | — |
| Internal Toggle Rate | 250 MHz | — |
| Maximum Operating Frequency | 126.6 MHz | 125 MHz |
| Programmable Type | In-System Programmable (EEPROM) | — |
| Programming Interface | IEEE 1149.1 JTAG | — |
| Montageart | Surface Mount (FBGA) | Surface Mount |
| Betriebstemperatur | 0C to +90C (commercial) | — |
| RoHS-Status | [DATA_NEEDED: rohs status] | [DATA_NEEDED: not confirmed in provided data] |
| MSL-Level | [DATA_NEEDED: msl level] | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Maximum User I/Os | — | 84 |
| Logic Elements / LABs | — | 16 Logic Array Blocks |
| Pin-to-Pin Logic Delay | — | 10 ns |
| Supply Voltage (Core) | — | 3.3 V |
| MultiVolt I/O Support | — | 2.5 V / 3.3 V / 5.0 V |
| Programmability | — | EEPROM, in-system via JTAG (IEEE 1149.1) |
| Betriebstemperaturbereich | — | 0C to +70C (commercial) [DATA_NEEDED: explicit grade from datasheet] |
| Process Technology | — | 0.30 µm EEPROM |
| Dedicated Inputs | — | 4 (global clock / clear / OE) |
| Lead-Free / Pb-Free | — | [DATA_NEEDED: not confirmed in provided data] |