EPM7256AEFC100-7 vs EPM7256AETC100-10N 比較
詳細な並列比較: EPM7256AEFC100-7 メーカー: Intel および EPM7256AETC100-10N メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Altera
EPM7256AETC100-10N - 256-Macro MAX 7000A CPLD, 10ns, TQFP-100 | Intel (Altera)
EPM7256AETC100-10N Obsolete仕様比較
| パラメータ | EPM7256AEFC100-7 | EPM7256AETC100-10N |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | 有効 | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $15.20 | $13.10 |
| Family | MAX 7000A | MAX 7000A |
| Macro Cells | 256 | 256 |
| Usable Gates | 5,000 | 5,000 |
| Logic Array Blocks | 16 | — |
| User I/Os | 84 | — |
| パッケージ | 100-pin FBGA (11x11 mm) | 100-pin TQFP |
| ピン数 | 100 | — |
| Supply Voltage - VCCINT | 3.0 V to 3.6 V | — |
| Supply Voltage - VCCIO | 2.5 V, 3.3 V, or 5 V (MultiVolt) | — |
| Propagation Delay (tPD) | 7.5 ns | — |
| Internal Toggle Rate | 250 MHz | — |
| Maximum Operating Frequency | 126.6 MHz | 125 MHz |
| Programmable Type | In-System Programmable (EEPROM) | — |
| Programming Interface | IEEE 1149.1 JTAG | — |
| 実装タイプ | Surface Mount (FBGA) | Surface Mount |
| 動作温度 | 0C to +90C (commercial) | — |
| RoHS ステータス | [DATA_NEEDED: rohs status] | [DATA_NEEDED: not confirmed in provided data] |
| MSLレベル | [DATA_NEEDED: msl level] | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Maximum User I/Os | — | 84 |
| Logic Elements / LABs | — | 16 Logic Array Blocks |
| Pin-to-Pin Logic Delay | — | 10 ns |
| Supply Voltage (Core) | — | 3.3 V |
| MultiVolt I/O Support | — | 2.5 V / 3.3 V / 5.0 V |
| Programmability | — | EEPROM, in-system via JTAG (IEEE 1149.1) |
| 動作温度範囲 | — | 0C to +70C (commercial) [DATA_NEEDED: explicit grade from datasheet] |
| Process Technology | — | 0.30 µm EEPROM |
| Dedicated Inputs | — | 4 (global clock / clear / OE) |
| Lead-Free / Pb-Free | — | [DATA_NEEDED: not confirmed in provided data] |