EPM7256AEQI208-7N vs EPM7256AQI208-10 Vergleich
Detaillierter Direktvergleich von EPM7256AEQI208-7N von Altera und EPM7256AQI208-10 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM7256AEQI208-7N | EPM7256AQI208-10 |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $0,00 | $13,22 |
| Family | MAX 7000A | MAX 7000A |
| Macrocells | 256 | 256 |
| Usable Gates | 5,000 | 5,000 |
| User I/O Pins | 164 | 68 |
| Logic Array Blocks | 16 | — |
| Pin-to-Pin Propagation Delay (tPD) | 7.5 ns | — |
| Maximum Internal Frequency | 126.6 MHz | 93.5 MHz |
| Versorgungsspannung | 3.3 V | — |
| Configuration Technology | EEPROM (non-volatile) | — |
| Gehäuse | 208-pin PQFP (FQFP) | PQFP-208 |
| Number of Terminals | 208 | — |
| Terminal Form | Gull Wing | — |
| Package Shape | Square | — |
| Montageart | Surface Mount | — |
| Operating Temperature Grade | Industrial | — |
| Speed Grade | -7 | — |
| RoHS-Status | Compliant (N suffix) | Compliant (lead-free per distributor data) |
| Lead Finish | [DATA_NEEDED: lead finish] | — |
| Logic Array Blocks (LABs) | — | 16 |
| Pin-to-Pin Propagation Delay | — | 10 ns |
| Maximum Counter Frequency | — | 227.3 MHz |
| Supply Voltage (Core) | — | 3.3 V |
| I/O Logic Compatibility | — | 5.0 V, 3.3 V, 2.5 V (MultiVolt) |
| Programmability | — | EEPROM, in-system via JTAG (IEEE 1149.1) |
| Betriebstemperatur | — | -40C to +85C (industrial) |
| Process Technology | — | CMOS, EEPROM-based |