EPM7256AEQI208-7N vs EPM7256AQI208-10 对比
详细并排对比 EPM7256AEQI208-7N 出自 Altera 和 EPM7256AQI208-10 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM7256AEQI208-7N | EPM7256AQI208-10 |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $0.00 | $13.22 |
| Family | MAX 7000A | MAX 7000A |
| Macrocells | 256 | 256 |
| Usable Gates | 5,000 | 5,000 |
| User I/O Pins | 164 | 68 |
| Logic Array Blocks | 16 | — |
| Pin-to-Pin Propagation Delay (tPD) | 7.5 ns | — |
| Maximum Internal Frequency | 126.6 MHz | 93.5 MHz |
| 电源电压 | 3.3 V | — |
| Configuration Technology | EEPROM (non-volatile) | — |
| 封装 | 208-pin PQFP (FQFP) | PQFP-208 |
| Number of Terminals | 208 | — |
| Terminal Form | Gull Wing | — |
| Package Shape | Square | — |
| 安装类型 | Surface Mount | — |
| Operating Temperature Grade | Industrial | — |
| Speed Grade | -7 | — |
| RoHS 状态 | Compliant (N suffix) | Compliant (lead-free per distributor data) |
| Lead Finish | [DATA_NEEDED: lead finish] | — |
| Logic Array Blocks (LABs) | — | 16 |
| Pin-to-Pin Propagation Delay | — | 10 ns |
| Maximum Counter Frequency | — | 227.3 MHz |
| Supply Voltage (Core) | — | 3.3 V |
| I/O Logic Compatibility | — | 5.0 V, 3.3 V, 2.5 V (MultiVolt) |
| Programmability | — | EEPROM, in-system via JTAG (IEEE 1149.1) |
| 工作温度 | — | -40C to +85C (industrial) |
| Process Technology | — | CMOS, EEPROM-based |