EPM7256SQC208-7 vs EPM7256SQC208-10 Vergleich
Detaillierter Direktvergleich von EPM7256SQC208-7 von Altera und EPM7256SQC208-10 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EPM7256SQC208-10 - MAX 7000S CPLD, 256 Macrocells, 10ns, 208-PQFP | Intel
EPM7256SQC208-10 ObsoleteSpezifikationsvergleich
| Parameter | EPM7256SQC208-7 | EPM7256SQC208-10 |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $0,00 | $11,20 |
| Device Family | MAX 7000S (EPM7256S) | — |
| Macrocells | 256 | 256 |
| Usable Gates | 5,000 | 5,000 |
| User I/O Pins | 164 | — |
| Propagation Delay (tPD) | 7.5 ns | 10 ns |
| Maximum Operating Frequency (fMAX) | 128.2 MHz | — |
| Supply Voltage (VCC) | 5.0 V | — |
| Configuration Technology | EEPROM (non-volatile) | — |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | — |
| Gehäuse | 208-pin PQFP (28 x 28 mm, 0.5 mm pitch) | 208-pin PQFP (SQC208) |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperaturbereich | Commercial (0C to +70C) | — |
| Minimum DC Input Voltage | -0.5 V | — |
| Input Undershoot Tolerance | -2.0 V for <100 mA, <20 ns | — |
| Speed Grade | -7 (7.5 ns) | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| MSL-Level | [DATA_NEEDED: MSL level] | 3 (168 hours) |
| Logic Levels | 5.0 V CMOS/TTL compatible | — |
| Series | — | MAX 7000S |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Array Blocks (LABs) | — | 16 |
| Number of I/O Pins | — | 164 |
| Counter Speed (fCNT) | — | Up to 175.4 MHz |
| Programmable Technology | — | EEPROM (in-system programmable) |
| JTAG Support (IEEE 1149.1) | — | Yes |
| PCI Compliance | — | PCI Local Bus Specification 2.2 compliant |
| Betriebstemperatur | — | 0C to +70C (commercial) |