EPM7256SQC208-7 vs EPM7256SQC208-10 对比
详细并排对比 EPM7256SQC208-7 出自 Altera 和 EPM7256SQC208-10 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Intel
EPM7256SQC208-10 - MAX 7000S CPLD, 256 Macrocells, 10ns, 208-PQFP | Intel
EPM7256SQC208-10 Obsolete规格对比
| 参数 | EPM7256SQC208-7 | EPM7256SQC208-10 |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $0.00 | $11.20 |
| Device Family | MAX 7000S (EPM7256S) | — |
| Macrocells | 256 | 256 |
| Usable Gates | 5,000 | 5,000 |
| User I/O Pins | 164 | — |
| Propagation Delay (tPD) | 7.5 ns | 10 ns |
| Maximum Operating Frequency (fMAX) | 128.2 MHz | — |
| Supply Voltage (VCC) | 5.0 V | — |
| Configuration Technology | EEPROM (non-volatile) | — |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | — |
| 封装 | 208-pin PQFP (28 x 28 mm, 0.5 mm pitch) | 208-pin PQFP (SQC208) |
| 安装类型 | Surface Mount | Surface Mount |
| 工作温度范围 | Commercial (0C to +70C) | — |
| Minimum DC Input Voltage | -0.5 V | — |
| Input Undershoot Tolerance | -2.0 V for <100 mA, <20 ns | — |
| Speed Grade | -7 (7.5 ns) | — |
| RoHS 状态 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| MSL 等级 | [DATA_NEEDED: MSL level] | 3 (168 hours) |
| Logic Levels | 5.0 V CMOS/TTL compatible | — |
| Series | — | MAX 7000S |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Array Blocks (LABs) | — | 16 |
| Number of I/O Pins | — | 164 |
| Counter Speed (fCNT) | — | Up to 175.4 MHz |
| Programmable Technology | — | EEPROM (in-system programmable) |
| JTAG Support (IEEE 1149.1) | — | Yes |
| PCI Compliance | — | PCI Local Bus Specification 2.2 compliant |
| 工作温度 | — | 0C to +70C (commercial) |