EPM9320LC84-15 vs EPM9320ALI84-10 Vergleich

Detaillierter Direktvergleich von EPM9320LC84-15 von Intel und EPM9320ALI84-10 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EPM9320LC84-15 EPM9320ALI84-10
Marke Intel Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete NRND
Lagerstatus In Stock In Stock
Stückpreis (USD) $17,95 $19,95
Family MAX 9000 MAX 9000
Series EPM9320 —
Device Type CPLD (Complex Programmable Logic Device) —
Macrocells 320 320
Usable Gates 6,000 6,000 to 12,000
Logic Array Blocks (LABs) 20 —
Propagation Delay (tPD) 15 ns (max) —
Maximale Taktfrequenz 117.6 MHz —
Supply Voltage (VCC) 4.75 V to 5.25 V (5.0 V nominal) 5.0 V
Programmability 5.0 V in-system programmable (ISP) via JTAG —
JTAG Interface IEEE Std. 1149.1 boundary-scan compliant —
Gehäuse 84-pin PLCC (Plastic Leaded Chip Carrier) 84-pin PLCC (Plastic Leaded Chip Carrier)
Montageart Surface Mount Surface Mount (PLCC socket compatible)
Betriebstemperatur -40C to +85C (commercial) [DATA_NEEDED: exact grade] —
Technology CMOS EEPROM-based, third-generation Multiple Array MatriX (MAX) —
Built-in Pull-up Resistors Yes, on every I/O pin —
Architecture Feature Pin-locking across design iterations —
RoHS-Status [DATA_NEEDED: confirm from manufacturer] —
Product Type — CPLD (Complex Programmable Logic Device)
User I/O Pins — 84
Pin-to-Pin Delay (Tpd1) — 10 ns
Maximum Counter Frequency — 144 MHz
In-System Programmability — Yes, via IEEE 1149.1 JTAG
Program Memory Technology — CMOS EEPROM
Process Technology — CMOS
Architecture — Multiple Array MatriX (MAX)
Betriebstemperaturbereich — -40C to +85C (Industrial)

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