EPM9320LC84-15 vs EPM9320LI84-20 Vergleich

Detaillierter Direktvergleich von EPM9320LC84-15 von Intel und EPM9320LI84-20 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EPM9320LC84-15 EPM9320LI84-20
Marke Intel Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $17,95 $12,80
Family MAX 9000 MAX 9000
Series EPM9320 —
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Macrocells 320 320
Usable Gates 6,000 —
Logic Array Blocks (LABs) 20 —
Propagation Delay (tPD) 15 ns (max) 20 ns
Maximale Taktfrequenz 117.6 MHz —
Supply Voltage (VCC) 4.75 V to 5.25 V (5.0 V nominal) —
Programmability 5.0 V in-system programmable (ISP) via JTAG —
JTAG Interface IEEE Std. 1149.1 boundary-scan compliant —
Gehäuse 84-pin PLCC (Plastic Leaded Chip Carrier) 84-PLCC (J-Lead, plastic LCC)
Montageart Surface Mount Surface Mount (PLCC socket-compatible)
Betriebstemperatur -40C to +85C (commercial) [DATA_NEEDED: exact grade] -40 C to +85 C (industrial)
Technology CMOS EEPROM-based, third-generation Multiple Array MatriX (MAX) —
Built-in Pull-up Resistors Yes, on every I/O pin —
Architecture Feature Pin-locking across design iterations —
RoHS-Status [DATA_NEEDED: confirm from manufacturer] [DATA_NEEDED: RoHS compliance]
Manufacturer — Altera (acquired by Intel)
User I/Os — 60
Internal Frequency — 118 MHz
Versorgungsspannung — 5.0 V
Logic Family — CMOS, EEPROM-based
Architecture — Multiple Array MatriX (MAX) - third generation
In-System Programmability — Yes (IEEE 1149.1 JTAG)
Process Technology — High-performance CMOS EEPROM

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