EPM9320LC84-20 vs EPM9320ALC84-15 Vergleich
Detaillierter Direktvergleich von EPM9320LC84-20 von Altera und EPM9320ALC84-15 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM9320LC84-20 | EPM9320ALC84-15 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $9,75 | $9,95 |
| Family | MAX 9000 | MAX 9000 CPLD |
| Device Type | CPLD - Complex Programmable Logic Device | — |
| Macrocells | 320 | 320 |
| User I/Os | 60 | — |
| Logic Family | CMOS (EEPROM-based) | — |
| Gehäuse | PLCC-84 (Plastic Leaded Chip Carrier) | 84-pin PLCC (S-PQCC-J84, J-lead) |
| Pins | 84 | — |
| Propagation Delay (tPD) | 16 ns | 16 ns |
| Internal Counter Frequency | 118 MHz | — |
| Versorgungsspannung | 5.0 V | — |
| Betriebstemperatur | 0 C to 70 C | -40C to +85C (industrial) |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | — |
| Dedicated Inputs | 4 (global clock / clear / OE) | — |
| Architecture | Multiple Array MatriX (MAX), 3rd generation | — |
| PCI Compliance | PCI Local Bus Specification Rev. 2.2 | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: rohs status] |
| Usable Gates | — | 6000 |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V (5 V nominal) |
| User I/O | — | 56 |
| Logic Array Blocks (LABs) | — | 16 |
| Technology | — | CMOS, EEPROM-based configuration |
| Montageart | — | Through-hole / socket |
| Programming Interface | — | JTAG (IEEE 1149.1) / ISP |
| Feuchtigkeitsempfindlichkeitsgrad (MSL) | — | MSL-3 (168 hours per fpgalink.com) |
| Lead-Free / Halogen-Free | — | [DATA_NEEDED: lead free status] |
| RoHS3 Compliance | — | ROHS3 Compliant (per fpgalink.com listing) |