EPM9320LC84-20 vs EPM9320ALC84-15 对比
详细并排对比 EPM9320LC84-20 出自 Altera 和 EPM9320ALC84-15 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM9320LC84-20 | EPM9320ALC84-15 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $9.75 | $9.95 |
| Family | MAX 9000 | MAX 9000 CPLD |
| Device Type | CPLD - Complex Programmable Logic Device | — |
| Macrocells | 320 | 320 |
| User I/Os | 60 | — |
| Logic Family | CMOS (EEPROM-based) | — |
| 封装 | PLCC-84 (Plastic Leaded Chip Carrier) | 84-pin PLCC (S-PQCC-J84, J-lead) |
| Pins | 84 | — |
| Propagation Delay (tPD) | 16 ns | 16 ns |
| Internal Counter Frequency | 118 MHz | — |
| 电源电压 | 5.0 V | — |
| 工作温度 | 0 C to 70 C | -40C to +85C (industrial) |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | — |
| Dedicated Inputs | 4 (global clock / clear / OE) | — |
| Architecture | Multiple Array MatriX (MAX), 3rd generation | — |
| PCI Compliance | PCI Local Bus Specification Rev. 2.2 | — |
| RoHS 状态 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: rohs status] |
| Usable Gates | — | 6000 |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V (5 V nominal) |
| User I/O | — | 56 |
| Logic Array Blocks (LABs) | — | 16 |
| Technology | — | CMOS, EEPROM-based configuration |
| 安装类型 | — | Through-hole / socket |
| Programming Interface | — | JTAG (IEEE 1149.1) / ISP |
| 湿敏等级（MSL） | — | MSL-3 (168 hours per fpgalink.com) |
| Lead-Free / Halogen-Free | — | [DATA_NEEDED: lead free status] |
| RoHS3 Compliance | — | ROHS3 Compliant (per fpgalink.com listing) |