EPM9560ARC208-10N vs EPM9560ARI240-10 Vergleich
Detaillierter Direktvergleich von EPM9560ARC208-10N von Altera und EPM9560ARI240-10 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM9560ARC208-10N | EPM9560ARI240-10 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $27,20 | $0,00 |
| Family | MAX 9000 | MAX 9000 |
| Macrocells | 560 | — |
| Usable Gates | 12,000 | 12,000 |
| User I/O Pins | 153 | 191 |
| Pin-to-Pin Delay | 10 ns | — |
| Internal Counter Frequency | 144.9 MHz | — |
| Versorgungsspannung | 5 V | 5.0 V |
| Technology | CMOS EEPROM | CMOS, EEPROM-based configuration |
| Gehäuse | 208-pin RQFP (PowerQuad II) | 240-pin RQFP (PowerQuad Flat Pack) |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperatur | 0 C to +70 C (commercial) | — |
| Configuration Memory | EEPROM (non-volatile) | EEPROM (non-volatile, instant-on) |
| In-System Programmability | Yes (JTAG ISP) | — |
| Logic Array Blocks (LABs) | 20 | — |
| Speed Grade | -10 | — |
| RoHS-Status | Compliant (N suffix) | [DATA_NEEDED: RoHS status] |
| Lead Finish | [DATA_NEEDED: lead finish] | — |
| MSL-Level | [DATA_NEEDED: MSL level] | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macro Cells | — | 560 |
| Pin-to-Pin Propagation Delay | — | 10 ns |
| Internal Frequency | — | 144.9 MHz |
| Betriebstemperaturbereich | — | -40 C to +85 C (industrial) |
| Logic Architecture | — | Multiple Array MatriX (MAX) with global interconnect array |
| Moisture Sensitivity Level | — | [DATA_NEEDED: MSL level] |
| Number of Terminals | — | 240 |
| Terminal Form | — | Gull Wing |