EPM9560ARC208-10N vs EPM9560ARI240-10 Comparison

Detailed side-by-side comparison of EPM9560ARC208-10N by Altera and EPM9560ARI240-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM9560ARC208-10N

EPM9560ARC208-10N - MAX 9000 CPLD 560 Macro 208-RQFP | Altera

EPM9560ARC208-10N Obsolete
Altera
EPM9560ARI240-10

EPM9560ARI240-10 - MAX 9000 CPLD 560 Macro Cells | Altera

EPM9560ARI240-10 Obsolete

Specification Comparison

Parameter EPM9560ARC208-10N EPM9560ARI240-10
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $27.20 $0.00
Family MAX 9000 MAX 9000
Macrocells 560 β€”
Usable Gates 12,000 12,000
User I/O Pins 153 191
Pin-to-Pin Delay 10 ns β€”
Internal Counter Frequency 144.9 MHz β€”
Supply Voltage 5 V 5.0 V
Technology CMOS EEPROM CMOS, EEPROM-based configuration
Package 208-pin RQFP (PowerQuad II) 240-pin RQFP (PowerQuad Flat Pack)
Mounting Type Surface Mount Surface Mount
Operating Temperature 0 C to +70 C (commercial) β€”
Configuration Memory EEPROM (non-volatile) EEPROM (non-volatile, instant-on)
In-System Programmability Yes (JTAG ISP) β€”
Logic Array Blocks (LABs) 20 β€”
Speed Grade -10 β€”
RoHS Status Compliant (N suffix) [DATA_NEEDED: RoHS status]
Lead Finish [DATA_NEEDED: lead finish] β€”
MSL Level [DATA_NEEDED: MSL level] β€”
Device Type β€” CPLD (Complex Programmable Logic Device)
Macro Cells β€” 560
Pin-to-Pin Propagation Delay β€” 10 ns
Internal Frequency β€” 144.9 MHz
Operating Temperature Range β€” -40 C to +85 C (industrial)
Logic Architecture β€” Multiple Array MatriX (MAX) with global interconnect array
Moisture Sensitivity Level β€” [DATA_NEEDED: MSL level]
Number of Terminals β€” 240
Terminal Form β€” Gull Wing

Datasheets & Resources

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