EPM9560RC304-15N vs EPM9560RC304-15F Vergleich

Detaillierter Direktvergleich von EPM9560RC304-15N von Altera und EPM9560RC304-15F von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EPM9560RC304-15N EPM9560RC304-15F
Marke Altera Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $19,80 $18,75
Family MAX 9000 —
Product Type CPLD (Complex Programmable Logic Device) —
Architecture Multiple Array MatriX (MAX) - 3rd generation Multiple Array MatriX (MAX) with PIA interconnect
Usable Gates 12,000 12,000
Macrocells 560 560
Logic Array Blocks (LABs) 16 (estimated from 560 macrocells) 16 (40 macrocells each)
Maximum Operating Frequency (fMAX) 117.6 MHz —
Pin-to-Pin Propagation Delay 15 ns (-15 speed grade) —
Supply Voltage (VCCINT) 5 V —
Gehäuse RQFP-304 RQFP-304 (304-pin Plastic QFP)
User I/O Count 304 (package-level) —
Process Technology High-performance CMOS EEPROM High-performance CMOS, EEPROM-based
In-System Programmability Yes (IEEE 1149.1 JTAG) —
Operating Temperature Grade Commercial (suffix N) —
RoHS-Status Compliant (lead-free per suffix N marking) [DATA_NEEDED: rohs status - not stated in source]
Device Family — MAX 9000
Series — EPM9560
Propagation Delay (tpd) — 16.6 ns (max)
Maximum Internal Frequency — 117.6 MHz
Core Supply Voltage — 5.0 V
User I/O Pins — 212
Dedicated Inputs — 4
Programming Technology — 5.0 V in-system EEPROM via JTAG (IEEE 1149.1)
Boundary Scan Test (BST) — Yes, JTAG-compliant
Betriebstemperatur — -40C to +85C (industrial)
Montageart — Surface Mount
MSL-Level — 3 (168 hours)

Datenblätter & Ressourcen

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