EPM9560RC304-15N vs EPM9560RC304-15F 对比

详细并排对比 EPM9560RC304-15N 出自 Altera 和 EPM9560RC304-15F 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM9560RC304-15N EPM9560RC304-15F
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $19.80 $18.75
Family MAX 9000 —
Product Type CPLD (Complex Programmable Logic Device) —
Architecture Multiple Array MatriX (MAX) - 3rd generation Multiple Array MatriX (MAX) with PIA interconnect
Usable Gates 12,000 12,000
Macrocells 560 560
Logic Array Blocks (LABs) 16 (estimated from 560 macrocells) 16 (40 macrocells each)
Maximum Operating Frequency (fMAX) 117.6 MHz —
Pin-to-Pin Propagation Delay 15 ns (-15 speed grade) —
Supply Voltage (VCCINT) 5 V —
封装 RQFP-304 RQFP-304 (304-pin Plastic QFP)
User I/O Count 304 (package-level) —
Process Technology High-performance CMOS EEPROM High-performance CMOS, EEPROM-based
In-System Programmability Yes (IEEE 1149.1 JTAG) —
Operating Temperature Grade Commercial (suffix N) —
RoHS 状态 Compliant (lead-free per suffix N marking) [DATA_NEEDED: rohs status - not stated in source]
Device Family — MAX 9000
Series — EPM9560
Propagation Delay (tpd) — 16.6 ns (max)
Maximum Internal Frequency — 117.6 MHz
Core Supply Voltage — 5.0 V
User I/O Pins — 212
Dedicated Inputs — 4
Programming Technology — 5.0 V in-system EEPROM via JTAG (IEEE 1149.1)
Boundary Scan Test (BST) — Yes, JTAG-compliant
工作温度 — -40C to +85C (industrial)
安装类型 — Surface Mount
MSL 等级 — 3 (168 hours)

数据手册与资源

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