EPM9560RC304-20 vs EPM9560RC340-15 Vergleich

Detaillierter Direktvergleich von EPM9560RC304-20 von Altera und EPM9560RC340-15 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EPM9560RC304-20 EPM9560RC340-15
Marke Altera Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $0,00 $24,00
Device Family MAX 9000 (EPM9560) —
Macrocells 560 560
Usable Gates 12,000 12,000
User I/O Lines 212 —
Propagation Delay (tPD) 20 ns —
Maximum Operating Frequency 100 MHz —
Core Supply Voltage 5.0 V —
I/O Voltage 3.3 V or 5 V (configurable) —
Configuration Technology EEPROM (in-system programmable) —
JTAG Interface IEEE Std. 1149.1 (built-in) —
Gehäuse 304-pin RQFP 340-RQFP (Reduced Quad Flat Pack)
Montageart Surface Mount Surface Mount
Betriebstemperatur [DATA_NEEDED: operating temperature range] —
Logic Array Blocks (LABs) 20 —
Speed Grade -20 —
RoHS-Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status - not explicitly stated in verified data]
MSL-Level [DATA_NEEDED: MSL level] —
Family — MAX 9000
Device Type — CPLD (Complex Programmable Logic Device)
Pin-to-Pin Delay (tPD) — 15 ns
Supply Voltage (VCC) — 4.75 V to 5.25 V (5.0 V nominal)
User I/O Pins — 212
Process Technology — CMOS EEPROM
In-System Programmability — Yes, via IEEE Std. 1149.1 JTAG
Operating Temperature (Commercial) — 0C to +70C
Architecture — Multiple Array MatriX (MAX) - 3rd generation
Boundary Scan — IEEE Std. 1149.1 JTAG
Programming Technology — EEPROM (non-volatile, reprogrammable)
Lead-Free — [DATA_NEEDED: lead-free status]

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