EPM9560RI208-20N vs EPM9560TC208-20 Vergleich
Detaillierter Direktvergleich von EPM9560RI208-20N von Intel und EPM9560TC208-20 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM9560RI208-20N | EPM9560TC208-20 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $0,00 | $60,00 |
| Device Family | MAX 9000 | MAX 9000 |
| Usable Gates | 12,000 | 12000 |
| Macrocells | 560 | 560 |
| Pin-to-Pin Delay | 20 ns (-20 speed grade) | — |
| Counter Speed | 100 MHz | — |
| Versorgungsspannung | 5.0 V | — |
| Configuration Technology | EEPROM (non-volatile) | — |
| In-System Programmability | Yes, via IEEE Std. 1149.1 JTAG | — |
| Gehäuse | 208-pin RQFP | TQFP-208 (TC208) |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperatur | Industrial (-40C to +85C) | [DATA_NEEDED: commercial/industrial temperature grade] |
| Development Tool | MAX+PLUS II | — |
| Design Entry | Schematic, VHDL, Verilog HDL, AHDL | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | unknown |
| Packaging | Tray | — |
| Logic Architecture | Third-generation MAX (Multiple Array MatriX) | — |
| Fabrication Process | Advanced CMOS | — |
| User I/O | — | 149 |
| Propagation Delay (tPD) | — | 20 ns |
| Speed Grade | — | -20 |
| Pin/Package Code | — | TC208 (JEDEC S-PQFP-G208) |
| Architecture | — | Multiple Array MatriX (MAX) - third generation |
| Technology | — | CMOS EEPROM |
| Core Supply Voltage | — | 5 V |
| I/O Supply Voltage (MultiVolt) | — | 3.3 V or 5 V |
| In-System Programming | — | Yes (IEEE Std 1149.1 JTAG) |
| Flip-Flops | — | 772 |