EPM9560SRC208-7 vs EPM9560RC208-10 Vergleich

Detaillierter Direktvergleich von EPM9560SRC208-7 von Altera und EPM9560RC208-10 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EPM9560SRC208-7 EPM9560RC208-10
Marke Altera Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus NRND Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $52,00 $15,40
Family MAX 9000 MAX 9000
Device Type EPLD (Erasable Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Usable Gates 12,000 12,000
Macrocells 560 560
Logic Array Blocks (LABs) 16 16
Maximum I/O Pins 212 —
Gehäuse 208-pin SQFP (Surface-mount Quad Flat Pack) 208-pin RQFP (Plastic Quad Flat Pack)
Pin-to-Pin Logic Delay (tPD) 7.0 ns —
Maximum Frequency (fCNT) [DATA_NEEDED: fCNT for -7 speed grade] —
Supply Voltage (VCC) 5.0 V (single supply) —
Programming Method In-system via IEEE Std 1149.1 JTAG —
Betriebstemperaturbereich -40 °C to +85 °C (industrial) —
Technology CMOS, EEPROM-based —
Montageart Surface Mount Surface Mount
RoHS-Status [DATA_NEEDED: per part marking / distributor listing] [DATA_NEEDED: not stated in retrieved distributor listings]
MSL-Level [DATA_NEEDED: not stated in mature datasheet] —
Maximum User I/O Pins — 212 (208-pin package variant)
Pin-to-Pin Delay (tPD) — 10 ns
Maximum Frequency (fMAX) — [DATA_NEEDED: internal toggle frequency in MHz]
Supply Voltage (VCCINT) — 5.0 V
I/O Standards Supported — 5.0 V TTL, 3.3 V LVTTL, 2.5 V (multiVolt I/O)
Configuration Memory — EEPROM (in-system programmable via JTAG)
Process Technology — 0.30 µm CMOS EEPROM
Betriebstemperatur — 0C to +70C (commercial)
Lead-Free — [DATA_NEEDED: confirm lead-free status -10 suffix is conventional Pb-containing]
Programmability — JTAG (IEEE 1149.1) in-system programming

Datenblätter & Ressourcen

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