EPM9560SRC208-7 vs EPM9560RC208-10 Comparison

Detailed side-by-side comparison of EPM9560SRC208-7 by Altera and EPM9560RC208-10 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM9560SRC208-7 EPM9560RC208-10
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $52.00 $15.40
Family MAX 9000 MAX 9000
Device Type EPLD (Erasable Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Usable Gates 12,000 12,000
Macrocells 560 560
Logic Array Blocks (LABs) 16 16
Maximum I/O Pins 212 β€”
Package 208-pin SQFP (Surface-mount Quad Flat Pack) 208-pin RQFP (Plastic Quad Flat Pack)
Pin-to-Pin Logic Delay (tPD) 7.0 ns β€”
Maximum Frequency (fCNT) [DATA_NEEDED: fCNT for -7 speed grade] β€”
Supply Voltage (VCC) 5.0 V (single supply) β€”
Programming Method In-system via IEEE Std 1149.1 JTAG β€”
Operating Temperature Range -40 Β°C to +85 Β°C (industrial) β€”
Technology CMOS, EEPROM-based β€”
Mounting Type Surface Mount Surface Mount
RoHS Status [DATA_NEEDED: per part marking / distributor listing] [DATA_NEEDED: not stated in retrieved distributor listings]
MSL Level [DATA_NEEDED: not stated in mature datasheet] β€”
Maximum User I/O Pins β€” 212 (208-pin package variant)
Pin-to-Pin Delay (tPD) β€” 10 ns
Maximum Frequency (fMAX) β€” [DATA_NEEDED: internal toggle frequency in MHz]
Supply Voltage (VCCINT) β€” 5.0 V
I/O Standards Supported β€” 5.0 V TTL, 3.3 V LVTTL, 2.5 V (multiVolt I/O)
Configuration Memory β€” EEPROM (in-system programmable via JTAG)
Process Technology β€” 0.30 Β΅m CMOS EEPROM
Operating Temperature β€” 0C to +70C (commercial)
Lead-Free β€” [DATA_NEEDED: confirm lead-free status -10 suffix is conventional Pb-containing]
Programmability β€” JTAG (IEEE 1149.1) in-system programming

Datasheets & Resources

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