H58G46AK6QX033 vs H58G66CK8BX147N Vergleich
Detaillierter Direktvergleich von H58G46AK6QX033 von SK hynix und H58G66CK8BX147N von SK hynix. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | H58G46AK6QX033 | H58G66CK8BX147N |
|---|---|---|
| Marke | SK hynix | SK hynix |
| Kategorie | Mobile LPDDR4 | Memory ICs |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $9,75 | $34,60 |
| Speichertyp | LPDDR5 (Low Power Double Data Rate 5) SDRAM | LPDDR5X SDRAM |
| Density | 16Gb (2 GB) | 64 Gbit (8 GB) |
| Speicherorganisation | x16 | x8 (single channel) |
| Datenrate | 6400 Mbps per pin | — |
| Peak Bandwidth | 12.8 GB/s (x16 channel) | — |
| Schnittstelle | LPDDR5 (JEDEC) | LPDDR5/LPDDR5X protocol |
| Grade | Automotive | — |
| Versorgungsspannung | [DATA_NEEDED: core/I-O supply voltage] | — |
| Package Type | FBGA (ball grid array) | — |
| Ball Count | [DATA_NEEDED: package ball count] | — |
| Betriebstemperatur | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: Operating Temperature Range] |
| Montageart | Surface Mount (soldered BGA) | Surface Mount |
| Application Domain | Automotive ADAS, infotainment, industrial computing | Smartphone, AI edge, server-class mobile computing |
| RoHS-Status | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS Status] |
| AEC-Q100 | [DATA_NEEDED: AEC-Q100 qualification level] | — |
| Refresh | [DATA_NEEDED: refresh scheme] | — |
| Maximum Data Rate | — | 8533 Mbps |
| Supply Voltage Domain | — | 0.5 V to 1.8 V |
| Core Voltage Class | — | 1.05 V (LPDDR5/LPDDR5X class) |
| Gehäuse | — | 315-ball FBGA |
| Standard Compliance | — | JEDEC-compliant single-channel SDRAM (per SK hynix 315-ball FBGA specification) |
| Channel Configuration | — | Single channel (x8 or x16 capable family) |
| Power Management | — | Dynamic voltage and frequency scaling (DVFSC/DVFSQ) |
| Refresh Scheme | — | LPDDR5 per-bank / all-bank refresh |