IPD90N06S407ATMA2 vs IPD30N06S2L13ATMA4 Vergleich
Detaillierter Direktvergleich von IPD90N06S407ATMA2 von Infineon und IPD30N06S2L13ATMA4 von Infineon. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Infineon
IPD30N06S2L13ATMA4 - 55V 30A N-Channel OptiMOS MOSFET | Infineon
IPD30N06S2L13ATMA4 ✓ AktivSpezifikationsvergleich
| Parameter | IPD90N06S407ATMA2 | IPD30N06S2L13ATMA4 |
|---|---|---|
| Marke | Infineon | Infineon |
| Kategorie | MOSFETs | MOSFETs |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $0,84 | $0,48 |
| FET Type | N-Channel Enhancement Mode | — |
| Drain-to-Source Voltage (V_DS) | 60 V | — |
| Continuous Drain Current (I_D at T_C) | 90 A | — |
| Pulsed Drain Current (I_DM) | [DATA_NEEDED: pulsed drain current] | — |
| R_DS(on) Max at V_GS=10 V, I_D=90 A | 6.9 mOhm | — |
| Gate Threshold Voltage (V_GS(th)) | 4 V at 40 uA | — |
| Total Gate Charge (Q_G) at V_GS=10 V | 56 nC | — |
| Maximum Power Dissipation (P_D at T_C) | 79 W | — |
| Betriebs-Sperrschichttemperatur | -55 C to +175 C | — |
| Storage Temperature | [DATA_NEEDED: storage temperature range] | — |
| Gehäuse | PG-TO252-3-11 (DPAK) | PG-TO252-3-11 (DPAK) |
| Montageart | Surface Mount | Surface Mount |
| Lead-Free / RoHS | Yes (Green Product) | Yes (Green Package) |
| MSL (Moisture Sensitivity Level) | MSL1 (up to 260 C peak reflow) | MSL1 (per JEDEC J-STD-020, up to 260 °C peak reflow) |
| Automotive Qualification | AEC-Q101 Qualified | AEC-Q101 qualified |
| Avalanche Rating | 100% Avalanche Tested | — |
| Manufacturer | — | Infineon Technologies |
| Part Family | — | OptiMOS |
| Channel Type | — | N-Channel |
| Mode | — | Enhancement |
| Drain-Source Voltage (Vds) | — | 55 V |
| Continuous Drain Current (Id) | — | 30 A (Tc) |
| Power Dissipation (Pd) | — | 136 W (Tc) |
| Betriebstemperatur | — | -55 °C to +175 °C (Tj) |
| Avalanche Tested | — | 100 % production-tested |
| Technology | — | Planar (OptiMOS) |
| On-State Resistance (Rds(on)) | — | [DATA_NEEDED: exact typ/max Rds(on) at Vgs=10V and at Vgs=4.5V] |
| Gate-Source Threshold (Vgs(th)) | — | Logic-level (typ [DATA_NEEDED: Vth typ/min/max]) |
| Total Gate Charge (Qg) | — | [DATA_NEEDED: Qg @ Vgs=10V, Id=30A] |
| Input Capacitance (Ciss) | — | [DATA_NEEDED: Ciss typ at Vds=25V] |
| Diode Reverse Recovery (trr) | — | [DATA_NEEDED: trr typ] |
| Pin-Anzahl | — | 3 (Drain tab + Gate + Source) |
| Tape and Reel Packaging | — | Yes (T&R per IEC 60286-3) |