M1AFS1500-FG676 vs M1AFS1500-2FG676I Vergleich
Detaillierter Direktvergleich von M1AFS1500-FG676 von Microchip Technology und M1AFS1500-2FG676I von Microchip Technology. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Microchip Technology
M1AFS1500-FG676 - 1.5M Gate Fusion FPGA, 252 I/O | Microchip
M1AFS1500-FG676 ✓ AktivMicrochip Technology
M1AFS1500-2FG676I - 1.5M-Gate Fusion FPGA, FBGA-676 | Microchip
M1AFS1500-2FG676I ✓ AktivSpezifikationsvergleich
| Parameter | M1AFS1500-FG676 | M1AFS1500-2FG676I |
|---|---|---|
| Marke | Microchip Technology | Microchip Technology |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $372,00 | $405,00 |
| Manufacturer | Microchip Technology (Microsemi) | — |
| Series | M1AFS1500 (Fusion) | — |
| Logic Cells | 38400 | — |
| Equivalent Gates | 1500000 | — |
| Number of I/O | 252 | — |
| Gehäuse / Bauform | 676-Ball FBGA (FG676) | — |
| Betriebsversorgungsspannung | 1.5 V | — |
| Supply Voltage Range | 1.425 V to 1.575 V | — |
| Process Technology | 130 nm flash CMOS | 130 nm CMOS |
| Configuration Type | Flash-based (instant-on) | — |
| Maximale Taktfrequenz | 350 MHz | — |
| Security | 128-bit flash lock, AES decryption | — |
| Montagestil | SMD/SMT | — |
| Minimum Operating Temperature | 0 C | — |
| Maximum Operating Temperature | +70 C | — |
| Packaging | Tray | — |
| RoHS-Status | [DATA_NEEDED: RoHS compliance status] | RoHS Non-Compliant (contains lead) |
| Family | — | Fusion (Mixed-Signal Flash FPGA) |
| System Gates | — | 1.5 M |
| Core Supply Voltage | — | 1.5 V |
| Speed Grade | — | 2 |
| Gehäuse | — | 676-ball FBGA (FG676) |
| Montageart | — | Surface Mount |
| Configuration Memory | — | On-chip flash (non-volatile, instant-on) |
| Betriebstemperaturbereich | — | Industrial (I suffix) -40C to +100C |
| Embedded Analog Features | — | On-chip ADC, clock conditioning circuit (CCC), power-on reset |
| External Configuration Device | — | Not required |
| Lead Free Status | — | Contains Lead |
| Packaging Method | — | Tray |
| Number of User I/O | — | [DATA_NEEDED: Number of User I/O] |
| Embedded SRAM | — | [DATA_NEEDED: Embedded SRAM capacity] |
| DLL/PLL Blocks | — | [DATA_NEEDED: Number of CCC blocks] |