MC68EC000E116 vs MC68HC000CEI16 Vergleich
Detaillierter Direktvergleich von MC68EC000E116 von NXP Semiconductors und MC68HC000CEI16 von NXP Semiconductors. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
NXP Semiconductors
MC68EC000E116 - 16MHz EC000 32-bit MPU | Freescale/NXP | 68-PLCC
MC68EC000E116 NrndNXP Semiconductors
MC68HC000CEI16 - 32-Bit 16MHz M68k MPU, 68-PLCC | NXP / Motorola
MC68HC000CEI16 ✓ AktivSpezifikationsvergleich
| Parameter | MC68EC000E116 | MC68HC000CEI16 |
|---|---|---|
| Marke | NXP Semiconductors | NXP Semiconductors |
| Kategorie | Microcontrollers | Microcontrollers |
| Lebenszyklusstatus | NRND | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $9,75 | $17,40 |
| Architecture | M680x0 (MC68000 family) | — |
| Core | 32-bit internal / 16-bit external data bus | — |
| Address Bus Width | 24-bit (16 MB addressable) | — |
| Datenbusbreite | 16-bit | — |
| Instruction Set | MC68000 (subset of full 68000, no MMU/co-processor) | — |
| Maximale Taktfrequenz | 16 MHz | 16 MHz |
| Versorgungsspannung | 5 V (TTL-compatible I/O) | 3.3 V / 5 V tolerant |
| Betriebstemperatur | 0C to +70C | -40 C to +85 C (industrial) |
| Gehäuse | 68-pin PLCC (24.21 x 24.21 mm) | 68-pin PLCC (J-Lead) 24.21 x 24.21 mm |
| Montageart | Surface Mount (PLCC socket compatible) | Surface Mount (PLCC socket required) |
| Pin-Anzahl | 68 | — |
| CPU Address Spaces | 7 (user/supervisor, instruction/data) | — |
| Interrupt Levels | 7 autovector + spurious interrupt vector | 7 (IPL0-IPL2 encoded, autovectored + vectored) |
| Register Model | 8 data registers (D0-D7), 8 address registers (A0-A7) | — |
| MMU | Not present (no 68851 support) | — |
| Coprocessor Interface | Not present | — |
| On-chip Cache | None (instruction prefetch queue only) | — |
| MSL-Level | [DATA_NEEDED: MSL Level] | — |
| RoHS-Status | [DATA_NEEDED: RoHS Status] | — |
| Core Architecture | — | M68000 (M68k) - 32-bit CISC |
| Family Variant | — | EC000 (Enhanced CMOS, low power) |
| External Data Bus Width | — | 16-bit (dynamic 8/16-bit sizing) |
| External Address Bus Width | — | 24-bit (16 MB address space) |
| Number of Cores | — | 1 |
| Data Registers | — | 8 x 32-bit (D0-D7) |
| Address Registers | — | 8 x 32-bit (A0-A7, A7' supervisor stack) |
| Operating Modes | — | User and Supervisor (separate stack pointers) |
| Lead Free / RoHS | — | Lead free, RoHS compliant |
| On-chip Clock Generator | — | Yes (external crystal or TTL clock at XTAL) |
| Typical Dhrystone Throughput | — | ~2 MIPS at 16 MHz |