MC68EC000E116 vs MC68HC000CEI16 Comparaison
Comparaison détaillée côte à côte de MC68EC000E116 par NXP Semiconductors et MC68HC000CEI16 par NXP Semiconductors. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
NXP Semiconductors
MC68EC000E116 - 16MHz EC000 32-bit MPU | Freescale/NXP | 68-PLCC
MC68EC000E116 NrndNXP Semiconductors
MC68HC000CEI16 - 32-Bit 16MHz M68k MPU, 68-PLCC | NXP / Motorola
MC68HC000CEI16 ✓ ActifComparaison des spécifications
| Paramètre | MC68EC000E116 | MC68HC000CEI16 |
|---|---|---|
| Marque | NXP Semiconductors | NXP Semiconductors |
| Catégorie | Microcontrollers | Microcontrollers |
| Statut du cycle de vie | NRND | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $9,75 | $17,40 |
| Architecture | M680x0 (MC68000 family) | — |
| Core | 32-bit internal / 16-bit external data bus | — |
| Address Bus Width | 24-bit (16 MB addressable) | — |
| Largeur du bus de données | 16-bit | — |
| Instruction Set | MC68000 (subset of full 68000, no MMU/co-processor) | — |
| Fréquence d'horloge maximale | 16 MHz | 16 MHz |
| Tension d'alimentation | 5 V (TTL-compatible I/O) | 3.3 V / 5 V tolerant |
| Température de fonctionnement | 0C to +70C | -40 C to +85 C (industrial) |
| Boîtier | 68-pin PLCC (24.21 x 24.21 mm) | 68-pin PLCC (J-Lead) 24.21 x 24.21 mm |
| Type de montage | Surface Mount (PLCC socket compatible) | Surface Mount (PLCC socket required) |
| Nombre de broches | 68 | — |
| CPU Address Spaces | 7 (user/supervisor, instruction/data) | — |
| Interrupt Levels | 7 autovector + spurious interrupt vector | 7 (IPL0-IPL2 encoded, autovectored + vectored) |
| Register Model | 8 data registers (D0-D7), 8 address registers (A0-A7) | — |
| MMU | Not present (no 68851 support) | — |
| Coprocessor Interface | Not present | — |
| On-chip Cache | None (instruction prefetch queue only) | — |
| Niveau MSL | [DATA_NEEDED: MSL Level] | — |
| Statut RoHS | [DATA_NEEDED: RoHS Status] | — |
| Core Architecture | — | M68000 (M68k) - 32-bit CISC |
| Family Variant | — | EC000 (Enhanced CMOS, low power) |
| External Data Bus Width | — | 16-bit (dynamic 8/16-bit sizing) |
| External Address Bus Width | — | 24-bit (16 MB address space) |
| Number of Cores | — | 1 |
| Data Registers | — | 8 x 32-bit (D0-D7) |
| Address Registers | — | 8 x 32-bit (A0-A7, A7' supervisor stack) |
| Operating Modes | — | User and Supervisor (separate stack pointers) |
| Lead Free / RoHS | — | Lead free, RoHS compliant |
| On-chip Clock Generator | — | Yes (external crystal or TTL clock at XTAL) |
| Typical Dhrystone Throughput | — | ~2 MIPS at 16 MHz |