MC9S08DZ60ACLH vs MC9S08DZ60ACLF Vergleich
Detaillierter Direktvergleich von MC9S08DZ60ACLH von NXP Semiconductors und MC9S08DZ60ACLF von NXP Semiconductors. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
NXP Semiconductors
MC9S08DZ60ACLF - 8-bit S08 MCU, 60KB Flash, CAN/LIN, 48-LQFP | NXP
MC9S08DZ60ACLF NrndSpezifikationsvergleich
| Parameter | MC9S08DZ60ACLH | MC9S08DZ60ACLF |
|---|---|---|
| Marke | NXP Semiconductors | NXP Semiconductors |
| Kategorie | Microcontrollers | Microcontrollers |
| Lebenszyklusstatus | NRND | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $5,10 | $6,85 |
| Core | HCS08 (8-bit CISC) | HCS08 (8-bit CISC) |
| CPU Frequency | 40 MHz CPU / 20 MHz bus | — |
| Flash Size | 60 KB (60K x 8) | — |
| RAM Size | 2 KB | — |
| EEPROM Size | 4 KB | — |
| Datenbusbreite | 8 bit | — |
| Gehäuse | 64-LQFP (10x10 mm) | 48-LQFP (7x7 mm) |
| Pin-Anzahl | 64 | — |
| Versorgungsspannung | 2.7 V to 5.5 V (3.3 V / 5 V dual) | — |
| ADC | 24-channel, 12-bit, 2.5 us conversion | 24-channel, 12-bit, 2.5 us conversion |
| CAN | 1 x CAN 2.0A/B | 1 x CAN 2.0 A/B |
| SCI (UART) | 2 channels | — |
| I2C | 1 channel | — |
| SPI | 1 channel | — |
| GPIO | 53 I/O pins | — |
| PWM | 6-channel timer/PWM | — |
| Betriebstemperatur | -40 C to +85 C (industrial) | -40C to +85C (industrial) [DATA_NEEDED: AEC-Q100 grade range] |
| Debug Interface | Background Debug Mode (BDM) | — |
| Montageart | Surface Mount | Surface Mount |
| RoHS-Status | Compliant | Compliant |
| Core Frequency | — | 40 MHz (20 MHz bus) |
| Program Memory (Flash) | — | 60 KB (60K x 8) |
| RAM | — | 4 KB |
| EEPROM / Emulated EEPROM | — | Available (size [DATA_NEEDED: EEPROM size]) |
| Operating Voltage | — | 2.7 V to 5.5 V |
| Supply Rails | — | 3.3 V / 5 V |
| LIN | — | Master LIN 2.0 interface |
| Communication Peripherals | — | SCI (SPI), IIC, MSCAN |
| Timer / PWM Channels | — | Multiple (count [DATA_NEEDED: timer/PWM channel count]) |
| LCD Driver | — | Yes (on-chip segment LCD driver) |
| MSL-Level | — | MSL 3 (per JEDEC J-STD-020) |
| Background Debug Mode (BGND) | — | Yes (on-chip emulation/debug) |
| Instruction Set | — | HC08 instruction set with added BGND instruction |