MSC8144ETVT800A vs MSC8156ESAG1000B Vergleich
Detaillierter Direktvergleich von MSC8144ETVT800A von NXP Semiconductors und MSC8156ESAG1000B von NXP Semiconductors. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
NXP Semiconductors
MSC8144ETVT800A - SC3400 Core DSP, 800MHz, 783-FCBGA | NXP
MSC8144ETVT800A ObsoleteNXP Semiconductors
MSC8156ESAG1000B - 6x SC3850 1GHz DSP SoC | NXP Semiconductors
MSC8156ESAG1000B ✗ AbgekündigtSpezifikationsvergleich
| Parameter | MSC8144ETVT800A | MSC8156ESAG1000B |
|---|---|---|
| Marke | NXP Semiconductors | NXP Semiconductors |
| Kategorie | DSP | DSP |
| Lebenszyklusstatus | Obsolete | Ende des Lebenszyklus |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $195,50 | $112,00 |
| Core Architecture | SC3400 StarCore (4-core) | — |
| Number of Cores | 4 | — |
| Core Clock Rate | 800 MHz | — |
| On-Chip RAM | 10.5 MB | — |
| Non-Volatile Memory | External (NOR/NAND boot ROM) | — |
| Core Voltage | 1.00 V | — |
| I/O Voltage | 3.30 V | — |
| Betriebstemperatur | -40C to +105C | 0C to +105C |
| Operating Temperature Grade | Extended Industrial | — |
| Montageart | Surface Mount | Surface Mount (BGA) |
| Gehäuse | 783-FCBGA (29x29 mm) | 783-ball FCBGA (29x29 mm) |
| Terminal Form | Ball | — |
| Number of Terminals | 783 | — |
| Package Code | BGA / FCBGA | — |
| Package Shape | Square | — |
| Interfaces | Ethernet (UTOPIA), I2C, SPI, TDM, UART | — |
| Technology | High-performance multi-core DSP, SIMD | — |
| RoHS-Status | [DATA_NEEDED: RoHS status not in web data] | [DATA_NEEDED: RoHS compliance] |
| DSP Cores | — | 6x SC3850 StarCore cores |
| Core Clock Frequency | — | 1 GHz per core |
| Aggregate Performance | — | [DATA_NEEDED: aggregate MMACS rating] |
| Process Technology | — | 45 nm CMOS |
| Hardware Accelerator | — | MAPLE-B baseband accelerator (turbo decode) |
| Memory Controller | — | 64-bit DDR2/DDR3, up to 800 MT/s |
| SerDes Lanes | — | 2 lanes, SRIO or PCIe (selectable) |
| Ethernet | — | 1x Gigabit Ethernet MAC |
| Packet Engine | — | QUICC Engine subsystem |
| Security Engine | — | SEC 4.0 (Cryptographic accelerator) |
| Versorgungsspannung | — | [DATA_NEEDED: core and I/O rail voltages] |
| Lebenszyklusstatus | — | End of Life (per NXP PCN) |