MSC8251SVT1000B vs MSC8256SVT1000B Vergleich
Detaillierter Direktvergleich von MSC8251SVT1000B von NXP Semiconductors und MSC8256SVT1000B von NXP Semiconductors. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
NXP Semiconductors
MSC8256SVT1000B - SC3850 6-Core DSP, 1GHz, 783-FCBGA | NXP
MSC8256SVT1000B ObsoleteSpezifikationsvergleich
| Parameter | MSC8251SVT1000B | MSC8256SVT1000B |
|---|---|---|
| Marke | NXP Semiconductors | NXP Semiconductors |
| Kategorie | DSP | DSP |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $65,00 | $189,00 |
| Manufacturer | NXP Semiconductors (formerly Freescale Semiconductor) | NXP Semiconductors (formerly Freescale) |
| Core Architecture | SC3850 StarCore, single core | StarCore SC3850 (VLE, 4-issue) |
| Core Revision | StarCore R2.1 | — |
| Maximum Core Clock | 1 GHz | — |
| MIPS | [DATA_NEEDED: MIPS rating for 1 GHz SC3850] | — |
| L1 Instruction Cache | 32 KB | — |
| L1 Data Cache | 32 KB | — |
| L2 Unified Cache | 512 KB (configurable, SRAM or MAP) | — |
| On-Chip RAM | 576 KB | — |
| Internal ROM | 96 KB | — |
| TDM Interfaces | 4 modules, up to 62.5 Mbps each, with H.110/H-MVIP support | — |
| Ethernet MAC | Yes (integrated) | — |
| PCI Express | Yes (integrated controller) | — |
| Serial RapidIO | Yes (SERDES-based) | — |
| DMA Controller | Multi-channel DMA | — |
| Package Type | FCBGA (Flip-Chip Ball Grid Array) | — |
| Package Pin Count | 783 balls | — |
| Package Dimensions | 29 mm x 29 mm | — |
| Montageart | Surface Mount | Surface Mount (BGA) |
| Lead-Free / Halogen-Free | Yes (lead-free, halogen-free package) | — |
| RoHS-Status | Compliant | [DATA_NEEDED: RoHS status] |
| Betriebstemperatur | [DATA_NEEDED: operating temperature grade] | -40C to +105C (industrial) |
| Series | — | StarCore MSC8256 |
| Type | — | SC3850 Six-Core Digital Signal Processor |
| Number of Cores | — | 6 |
| Core Clock Speed | — | 1 GHz |
| Aggregate Throughput | — | 1000 MIPS per core (6000 MIPS total) |
| Data Width | — | 32-bit / 64-bit |
| L1 Instruction Cache (per core) | — | 32 KB |
| L1 Data Cache (per core) | — | 32 KB |
| Unified L2 Cache (per core) | — | 512 KB (configurable to M2 memory in 64 KB increments) |
| On-Chip RAM (total) | — | 576 KB |
| Non-Volatile Memory (ROM) | — | 96 KB |
| MMU | — | Yes (hardware memory management unit) |
| EPIC (Interrupt Controller) | — | Yes (Extended Programmable Interrupt Controller) |
| Timers (per core) | — | 2 x 32-bit general-purpose |
| DDR Memory Controller | — | DDR2/DDR3 with ECC |
| High-Speed Interfaces | — | Serial RapidIO, PCI Express, SGMII, RGMII |
| Peripheral Interfaces | — | I2C, SPI, UART, GPIO |
| Security Engine | — | SEC (cryptographic acceleration) |
| Gehäuse | — | 783-FCBGA (29x29 mm) |
| MSL-Level | — | [DATA_NEEDED: MSL rating] |