RTAX2000D-1CQ352E vs RTAX2000DL-CQ352E Vergleich
Detaillierter Direktvergleich von RTAX2000D-1CQ352E von Microchip Technology und RTAX2000DL-CQ352E von Microchip Technology. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Microchip Technology
RTAX2000D-1CQ352E - 2M-Gate Rad-Tolerant FPGA CQFP352 | Microchip
RTAX2000D-1CQ352E ✓ AktivMicrochip Technology
RTAX2000DL-CQ352E - 2M-Gate Rad-Tolerant FPGA CQFP-352 | Microchip
RTAX2000DL-CQ352E ✓ AktivSpezifikationsvergleich
| Parameter | RTAX2000D-1CQ352E | RTAX2000DL-CQ352E |
|---|---|---|
| Marke | Microchip Technology | Microchip Technology |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $3.650,00 | $3.360,00 |
| Equivalent System Gates | 2000000 gates | — |
| Logic Organization | 19712 CLBs | — |
| Technology | Digital CMOS FPGA, antifuse (nonvolatile) | Digital CMOS |
| Gehäuse | CQFP352 (352-terminal Ceramic Quad Flat Pack) | CQFP-352 (Ceramic Quad Flat Pack) |
| Betriebstemperaturbereich | -55C to +125C | — |
| Family | RTAX-S/SL and RTAX-DSP Radiation-Tolerant FPGAs | RTAX-S/SL and RTAX-DSP Radiation-Tolerant FPGAs |
| Total Ionizing Dose (Functional) | 300 krad | — |
| Total Ionizing Dose (Rated) | 200 krad | — |
| DSP Mathblocks | Up to 120 | — |
| DSP MAC Performance | 125 MHz, 18-bit x 18-bit multiply-accumulate | — |
| Embedded Memory | Up to 540 kbits with optional EDAC protection | Embedded SRAM with built-in FIFO control logic |
| Programmability | One-time programmable (antifuse) | — |
| Versorgungsspannung | [DATA_NEEDED: core/supply voltage] | [DATA_NEEDED: core supply voltage] |
| User I/O Terminals | [DATA_NEEDED: user I/O count for CQ352] | — |
| Max System Frequency | [DATA_NEEDED: max system frequency] | — |
| Radiation Environment Target | Space-based applications | — |
| Commercial Prototype Equivalent | Axcelerator family device | — |
| System Gates | — | 2,000,000 |
| Configurable Logic Blocks (CLBs) | — | 19,712 |
| Programmable Type | — | Antifuse (one-time programmable), live at power-up |
| Package Dimensions | — | 48 mm x 48 mm |
| Terminal Pitch | — | 0.50 mm |
| Number of Terminals | — | 352 |
| User Input Terminals | — | 166 |
| User Output Terminals | — | 166 |
| Clock Features | — | Segmentable clocks, chip-wide highway routing |
| Speed Grade | — | D (standard) |
| Application Domain | — | Space-flight systems (radiation tolerant) |
| Betriebstemperatur | — | [DATA_NEEDED: operating temperature range] |
| Montageart | — | Surface Mount |