RTAX2000D-1CQ352E vs RTAX2000DL-CQ352E Comparaison
Comparaison détaillée côte à côte de RTAX2000D-1CQ352E par Microchip Technology et RTAX2000DL-CQ352E par Microchip Technology. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Microchip Technology
RTAX2000D-1CQ352E - 2M-Gate Rad-Tolerant FPGA CQFP352 | Microchip
RTAX2000D-1CQ352E ✓ ActifMicrochip Technology
RTAX2000DL-CQ352E - 2M-Gate Rad-Tolerant FPGA CQFP-352 | Microchip
RTAX2000DL-CQ352E ✓ ActifComparaison des spécifications
| Paramètre | RTAX2000D-1CQ352E | RTAX2000DL-CQ352E |
|---|---|---|
| Marque | Microchip Technology | Microchip Technology |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $3 650,00 | $3 360,00 |
| Equivalent System Gates | 2000000 gates | — |
| Logic Organization | 19712 CLBs | — |
| Technology | Digital CMOS FPGA, antifuse (nonvolatile) | Digital CMOS |
| Boîtier | CQFP352 (352-terminal Ceramic Quad Flat Pack) | CQFP-352 (Ceramic Quad Flat Pack) |
| Plage de température de fonctionnement | -55C to +125C | — |
| Family | RTAX-S/SL and RTAX-DSP Radiation-Tolerant FPGAs | RTAX-S/SL and RTAX-DSP Radiation-Tolerant FPGAs |
| Total Ionizing Dose (Functional) | 300 krad | — |
| Total Ionizing Dose (Rated) | 200 krad | — |
| DSP Mathblocks | Up to 120 | — |
| DSP MAC Performance | 125 MHz, 18-bit x 18-bit multiply-accumulate | — |
| Embedded Memory | Up to 540 kbits with optional EDAC protection | Embedded SRAM with built-in FIFO control logic |
| Programmability | One-time programmable (antifuse) | — |
| Tension d'alimentation | [DATA_NEEDED: core/supply voltage] | [DATA_NEEDED: core supply voltage] |
| User I/O Terminals | [DATA_NEEDED: user I/O count for CQ352] | — |
| Max System Frequency | [DATA_NEEDED: max system frequency] | — |
| Radiation Environment Target | Space-based applications | — |
| Commercial Prototype Equivalent | Axcelerator family device | — |
| System Gates | — | 2,000,000 |
| Configurable Logic Blocks (CLBs) | — | 19,712 |
| Programmable Type | — | Antifuse (one-time programmable), live at power-up |
| Package Dimensions | — | 48 mm x 48 mm |
| Terminal Pitch | — | 0.50 mm |
| Number of Terminals | — | 352 |
| User Input Terminals | — | 166 |
| User Output Terminals | — | 166 |
| Clock Features | — | Segmentable clocks, chip-wide highway routing |
| Speed Grade | — | D (standard) |
| Application Domain | — | Space-flight systems (radiation tolerant) |
| Température de fonctionnement | — | [DATA_NEEDED: operating temperature range] |
| Type de montage | — | Surface Mount |