RTAX2000D-1CQ352V vs RTAX2000DL-CQ352V Vergleich

Detaillierter Direktvergleich von RTAX2000D-1CQ352V von Microchip Technology und RTAX2000DL-CQ352V von Microchip Technology. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Microchip Technology
RTAX2000D-1CQ352V RTAX2000D-1CQ352V - 2M-Gate Rad-Tolerant FPGA | Microchip

RTAX2000D-1CQ352V - 2M-Gate Rad-Tolerant FPGA | Microchip

RTAX2000D-1CQ352V ✓ Aktiv
Microchip Technology
RTAX2000DL-CQ352V RTAX2000DL-CQ352V - 2M-Gate Rad-Tolerant FPGA | Microchip

RTAX2000DL-CQ352V - 2M-Gate Rad-Tolerant FPGA | Microchip

RTAX2000DL-CQ352V ✓ Aktiv

Spezifikationsvergleich

Parameter RTAX2000D-1CQ352V RTAX2000DL-CQ352V
Marke Microchip Technology Microchip Technology
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Aktiv Aktiv
Lagerstatus In Stock In Stock
Stückpreis (USD) $3.950,00 $0,00
Equivalent Gates 2,000,000 —
Logic Cells 29,568 29,568
CLBs 19,712 19,712
Core Supply Voltage 1.425 V to 1.575 V (nominal 1.5 V) 1.5 V nominal (1.425 V to 1.575 V)
DSP Mathblocks Up to 120 Up to 120 (18-bit x 18-bit MAC, up to 125 MHz)
DSP MAC Performance 125 MHz, 18-bit x 18-bit multiply-accumulate —
Embedded Memory Up to 540 kbits with optional EDAC protection Up to 540 kbits SRAM with optional EDAC
Technology Digital CMOS, antifuse (nonvolatile) CMOS, antifuse (nonvolatile, one-time programmable)
Total Ionizing Dose (Functional) 300 krad (Si) —
Total Ionizing Dose 200 krad (Si) —
Configuration Live at power-up, single-chip, no external configuration device Live-at-power-up (antifuse, no external boot device)
Speed Grade -1 —
Gehäuse CQFP-352 (CQ352), ceramic CQFP-352, hermetically sealed ceramic, metal-sealed cofired
Montageart Surface Mount Surface Mount
Screening RTAX-D (Condition A, tighter ICCA limits at 125C final electrical test) —
Betriebstemperatur [DATA_NEEDED: Operating Temperature] -55C to +125C
RoHS-Status [DATA_NEEDED: RoHS Status] —
Equivalent System Gates — 2,000,000
Maximum Combinatorial Delay — 1.100 ns
Total Ionizing Dose (TID) — 300 krad (functional); 200 krad (per family data)
Terminal Pitch — 0.500 mm
Family — RTAX-DSP (RTAX-S/SL and RTAX-DSP radiation-tolerant FPGAs)

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