RTAX2000S-CQ256V vs RTAX2000S-1CQ256PROTO Vergleich
Detaillierter Direktvergleich von RTAX2000S-CQ256V von Microchip Technology und RTAX2000S-1CQ256PROTO von Microchip Technology. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Microchip Technology
RTAX2000S-CQ256V - 2M-Gate Rad-Tolerant FPGA, CQFP-256 | Microchip
RTAX2000S-CQ256V ✓ AktivMicrochip Technology
RTAX2000S-1CQ256PROTO - 2M-Gate Rad-Tolerant FPGA Proto | Microchip
RTAX2000S-1CQ256PROTO ✓ AktivSpezifikationsvergleich
| Parameter | RTAX2000S-CQ256V | RTAX2000S-1CQ256PROTO |
|---|---|---|
| Marke | Microchip Technology | Microchip Technology |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $0,00 | $1.595,00 |
| System Gates | 2,000,000 gates | — |
| Logic Cells | 32,256 | — |
| Configurable Logic Blocks (CLBs) | 21,504 | — |
| Technology | CMOS antifuse | Antifuse (nonvolatile, OTP), CMOS |
| Programming Type | One-Time Programmable (OTP) | — |
| Radiation Tolerance | Radiation-tolerant (RTAX-S family, space-flight grade) | — |
| Configuration | Live at power-up, non-volatile, single-chip | Live at power-up, no external boot device |
| Gehäuse | CQFP-256 (ceramic quad flat, JESD-30: S-CQFP-F256) | CQ256 ceramic quad package, 256 pins |
| Montageart | Surface Mount | Surface Mount |
| Core Voltage | [DATA_NEEDED: core voltage] | — |
| I/O Voltage | [DATA_NEEDED: I/O voltage] | — |
| Maximum User I/O | [DATA_NEEDED: maximum user I/O count] | — |
| Betriebstemperatur | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range for PROTO suffix] |
| Speed Grade | [DATA_NEEDED: speed grade suffix definition] | — |
| Embedded Memory | [DATA_NEEDED: embedded SRAM blocks] | up to 540 kbits with optional EDAC |
| RoHS-Status | [DATA_NEEDED: RoHS status] | — |
| MSL-Level | [DATA_NEEDED: moisture sensitivity level] | — |
| Logic Blocks (CLBs) | — | 21504 |
| Equivalent System Gates | — | 2000000 |
| Additional ASIC Gates | — | 250000 |
| SEU Rate | — | less than 1E-10 errors per bit-day (family spec) |
| Total Ionizing Dose (Functional) | — | 300 krad |
| Total Ionizing Dose (Parametric) | — | 200 krad |
| Logic Family | — | CMOS |
| Maximum User I/Os (family) | — | up to 684 (density dependent) |
| Architecture Base | — | Axcelerator compatible fabric |
| Product Grade | — | PROTO - engineering prototyping unit |
| Versorgungsspannung | — | [DATA_NEEDED: core and I/O supply voltage] |