RTAX2000S-CQ256V vs RTAX2000S-1CQ256PROTO Comparaison
Comparaison détaillée côte à côte de RTAX2000S-CQ256V par Microchip Technology et RTAX2000S-1CQ256PROTO par Microchip Technology. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Microchip Technology
RTAX2000S-CQ256V - 2M-Gate Rad-Tolerant FPGA, CQFP-256 | Microchip
RTAX2000S-CQ256V ✓ ActifMicrochip Technology
RTAX2000S-1CQ256PROTO - 2M-Gate Rad-Tolerant FPGA Proto | Microchip
RTAX2000S-1CQ256PROTO ✓ ActifComparaison des spécifications
| Paramètre | RTAX2000S-CQ256V | RTAX2000S-1CQ256PROTO |
|---|---|---|
| Marque | Microchip Technology | Microchip Technology |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $0,00 | $1 595,00 |
| System Gates | 2,000,000 gates | — |
| Logic Cells | 32,256 | — |
| Configurable Logic Blocks (CLBs) | 21,504 | — |
| Technology | CMOS antifuse | Antifuse (nonvolatile, OTP), CMOS |
| Programming Type | One-Time Programmable (OTP) | — |
| Radiation Tolerance | Radiation-tolerant (RTAX-S family, space-flight grade) | — |
| Configuration | Live at power-up, non-volatile, single-chip | Live at power-up, no external boot device |
| Boîtier | CQFP-256 (ceramic quad flat, JESD-30: S-CQFP-F256) | CQ256 ceramic quad package, 256 pins |
| Type de montage | Surface Mount | Surface Mount |
| Core Voltage | [DATA_NEEDED: core voltage] | — |
| I/O Voltage | [DATA_NEEDED: I/O voltage] | — |
| Maximum User I/O | [DATA_NEEDED: maximum user I/O count] | — |
| Température de fonctionnement | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range for PROTO suffix] |
| Speed Grade | [DATA_NEEDED: speed grade suffix definition] | — |
| Embedded Memory | [DATA_NEEDED: embedded SRAM blocks] | up to 540 kbits with optional EDAC |
| Statut RoHS | [DATA_NEEDED: RoHS status] | — |
| Niveau MSL | [DATA_NEEDED: moisture sensitivity level] | — |
| Logic Blocks (CLBs) | — | 21504 |
| Equivalent System Gates | — | 2000000 |
| Additional ASIC Gates | — | 250000 |
| SEU Rate | — | less than 1E-10 errors per bit-day (family spec) |
| Total Ionizing Dose (Functional) | — | 300 krad |
| Total Ionizing Dose (Parametric) | — | 200 krad |
| Logic Family | — | CMOS |
| Maximum User I/Os (family) | — | up to 684 (density dependent) |
| Architecture Base | — | Axcelerator compatible fabric |
| Product Grade | — | PROTO - engineering prototyping unit |
| Tension d'alimentation | — | [DATA_NEEDED: core and I/O supply voltage] |