SI5340A-D-GM vs SI5341B-D11825-GMR Vergleich
Detaillierter Direktvergleich von SI5340A-D-GM von Skyworks Solutions und SI5341B-D11825-GMR von Skyworks Solutions. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Skyworks Solutions
SI5340A-D-GM - 1028 MHz Ultra-Low Jitter 4-Output Clock Gen | Skyworks
SI5340A-D-GM ✓ AktivSkyworks Solutions
SI5341B-D11825-GMR - 10-Output Clock Generator | Skyworks
SI5341B-D11825-GMR ✓ AktivSpezifikationsvergleich
| Parameter | SI5340A-D-GM | SI5341B-D11825-GMR |
|---|---|---|
| Marke | Skyworks Solutions | Skyworks Solutions |
| Kategorie | Clock & Timing | Clock & Timing |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $14,75 | $4,21 |
| Funktion | Clock generator, any-frequency, any-output | Clock generator, 10 outputs |
| Anzahl der Ausgänge | 4 | 10 |
| Number of References | 4 | — |
| Maximum Output Frequency | 1028 MHz | — |
| Output Logic | LVPECL, LVDS, HCSL, CMOS, CML (per output) | — |
| Versorgungsspannung | 1.71 V to 3.47 V (core); 1.8 V / 2.5 V / 3.3 V typical | [DATA_NEEDED: VDD range and number of rails] |
| Phase Jitter (12 kHz to 20 MHz) | 0.09 ps RMS (typical) | — |
| Frequency Synthesis Modes | Integer and fractional (MultiSynth) | — |
| Control Interface | I2C / SPI | I2C / SPI |
| Output Enable / Disable | Per-output | — |
| Gehäuse | 44-pin QFN (7x7 mm) with exposed pad | 64-VFQFN Exposed Pad |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperatur | -40 C to +85 C (industrial) | -40C to +85C |
| MSL-Level | 3 | [DATA_NEEDED: MSL rating] |
| RoHS-Status | Compliant | Compliant |
| Family | Si5340 / Si5341 | — |
| Order Code Suffix | -D (4-output default frequency plan) | — |
| Manufacturer | Skyworks Solutions Inc. (formerly Silicon Labs) | — |
| Output Frequency Range | — | up to 350 MHz per output |
| Number of Inputs | — | 2 (differential) [DATA_NEEDED: input frequency range] |
| Output Jitter (RMS) | — | [DATA_NEEDED: jitter value] - sub-200 fs RMS typical per family datasheet |
| Ausgangstyp | — | CML, LVDS, LVCMOS, HCSL, LVPECL (programmable) [DATA_NEEDED: exact driver list per -D11825 order code] |
| Input Type | — | Differential crystal or reference clock |
| Frequency Synthesis Method | — | MultiSynth fractional-N |
| Configuration | — | Factory pre-programmed frequency plan (suffix -D11825-) |