SI5345A-D-GM vs SI5345B-D-GM Vergleich
Detaillierter Direktvergleich von SI5345A-D-GM von Skyworks Solutions und SI5345B-D-GM von Skyworks Solutions. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Skyworks Solutions
SI5345A-D-GM - 10-Output Jitter Attenuator, <1028 MHz | Skyworks
SI5345A-D-GM ✓ AktivSpezifikationsvergleich
| Parameter | SI5345A-D-GM | SI5345B-D-GM |
|---|---|---|
| Marke | Skyworks Solutions | Skyworks Solutions |
| Kategorie | Clock & Timing | Clock & Timing |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $27,50 | $8,55 |
| Product Type | 10-Channel Any-Frequency Any-Output Jitter Attenuator / Clock Multiplier | — |
| Series | Si5345 (Si5345A/B/C/D variants) | — |
| Anzahl der Ausgänge | 10 | 10 |
| Differential Input Frequency Range | 8 kHz to 750 MHz | — |
| LVCMOS Input Frequency Range | 8 kHz to 250 MHz | — |
| Differential Output Frequency Range | 100 Hz to 1028 MHz | — |
| Output RMS Jitter | 90 fs typical (12 kHz to 20 MHz) | — |
| External Crystal Reference | 25 to 54 MHz (XA/XB pins) | — |
| Jitter Attenuation Bandwidth | Digitally programmable | Digitally programmable |
| Architecture | DSPLL with digital holdover | — |
| Configuration Interface | I2C / SPI (ClockBuilder Pro software) | — |
| Gehäuse | 64-VFQFN Exposed Pad (QFN-64 EP, 9x9 mm) | 64-pin QFN Exposed Pad (9x9 mm) |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperaturbereich | -40C to +85C (industrial) | [DATA_NEEDED: operating temperature range] |
| Versorgungsspannung | 1.8 V / 2.5 V / 3.3 V core and I/O (per register config) | 1.8 V / 3.3 V (core / IO) |
| RoHS-Status | Compliant | Compliant |
| Lead-Free / Halogen-Free | Lead-free per Skyworks product page | — |
| Funktion | — | 10-channel any-frequency jitter attenuator / clock multiplier |
| Output Frequency Range | — | 0.001 MHz to 350 MHz |
| Phase Jitter (RMS, typical) | — | 0.09 ps |
| Reference Input Frequency Range | — | [DATA_NEEDED: reference input frequency range] |
| Output Logic Formats | — | LVCMOS, LVDS, LVPECL, HCSL, CML |
| Control Interface | — | I2C / SPI (serial) |
| On-chip NVM | — | Yes (in-circuit programmable, powers up configured) |
| Technology | — | DSPLL (4th gen) + MultiSynth fractional dividers |
| MSL-Level | — | [DATA_NEEDED: MSL level] |