XC7Z100-2FFG900I vs XC7Z100-2FF900I Vergleich
Detaillierter Direktvergleich von XC7Z100-2FFG900I von AMD und XC7Z100-2FF900I von AMD. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
AMD
XC7Z100-2FFG900I - Zynq-7000 SoC, Kintex-7 FPGA, 444K Logic Cells | AMD
XC7Z100-2FFG900I ✓ AktivSpezifikationsvergleich
| Parameter | XC7Z100-2FFG900I | XC7Z100-2FF900I |
|---|---|---|
| Marke | AMD | AMD |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Device Family | Zynq-7000 All Programmable SoC | — |
| Architecture | ARM Cortex-A9 dual-core MPCore + Kintex-7 FPGA | — |
| Logic Cells (PL) | 444K | — |
| Block RAM | 26.5 Mb | — |
| DSP Slices | 1540 (DSP48E1) | — |
| Processor Cores | 2x ARM Cortex-A9 MPCore with CoreSight | — |
| Max Processor Frequency | 800 MHz (up to 1 GHz with -3 speed grade) | — |
| Transceivers | 16x GTX up to 6.25 Gb/s | — |
| PCIe Hard Blocks | 4x Gen2 (Root Complex or Endpoint) | — |
| Memory Interfaces | DDR3, DDR3L, DDR2, LPDDR2 (16-bit and 32-bit; ECC on PS side) | — |
| Ethernet MACs | 2x 10/100/1000 Mbps GEM | — |
| USB | 2x USB 2.0 OTG | — |
| Security | AES, SHA-256, RSA, secure boot, JTAG disable | — |
| ADC | Dual 12-bit 1 MSPS XADC | — |
| Betriebstemperatur | -40C to +100C (Industrial) | — |
| Gehäuse | 900-ball FCBGA (FFG) 31x31 mm | 900-FCBGA, 31 mm x 31 mm |
| Speed Grade | -2 (mid-performance) | — |
| Temperature Grade | I (Industrial) | Industrial |
| Device Type | — | Zynq-7000 Kintex-7 programmable system-on-chip |
| Processor Subsystem | — | Dual ARM Cortex-A9 MPCore |
| Processor Clock Rating | — | 800 MHz |
| FPGA Logic Cells | — | 444K logic cells |
| FPGA Family | — | Kintex-7 |
| Package Pin Count | — | 900 pins |
| Device Speed Grade | — | -2 |
| Montageart | — | Surface mount |
| Integrated Programmable Logic | — | 444K Kintex-7 logic cells |
| Debug Support | — | ARM CoreSight debug resources |
| Design Toolchain | — | AMD FPGA and SoC development toolchain; exact version [DATA_NEEDED: design toolchain version] |
| Betriebstemperaturbereich | — | [DATA_NEEDED: minimum and maximum operating temperature] |
| Number of High-Speed Transceivers | — | [DATA_NEEDED: transceiver count] |
| Maximum Transceiver Data Rate | — | [DATA_NEEDED: maximum transceiver data rate] |
| Programmable I/O Count | — | [DATA_NEEDED: programmable I/O count] |
| Memory Interface Details | — | [DATA_NEEDED: memory interface types and supported rates] |
| Power Supply Inputs | — | [DATA_NEEDED: supply rail names and voltage ranges] |
| Typical Power Consumption | — | [DATA_NEEDED: typical and maximum power consumption] |
| RoHS-Status | — | [DATA_NEEDED: RoHS compliance declaration] |
| REACH Status | — | [DATA_NEEDED: REACH compliance declaration] |
| Lead-Free Status | — | [DATA_NEEDED: lead-free packaging declaration] |
| AEC-Q100 Qualification | — | Not applicable; this is an FPGA and SoC rather than an automotive-grade discrete component |
| Package Thermal Resistance | — | [DATA_NEEDED: package thermal resistance] |