NXP Semiconductors

68HC11 - 8-bit M68HC11 HCMOS Microcontroller Family | Motorola

Teilenummer: 68HC11 ✗ Abgekündigt
Auf Lager Versand in 1–3 Werktagen
5 V +/- 10% Vdss PLCC-52 (FN suffix); also DIP and QFP variants Package Up to 3 MHz (at 5 V) Speed 0 / 12 / 20 Kbytes (variant dependent) Memory
Ab $9.85 USD / Stück
MOQ: 1 |
Preis aktualisiert: 2026-10-11
Mengenpreise
Menge Stückpreis Gesamt
1 $18.5 $18,50
10 $16.2 $162,00
100 $13.95 $1.395,00
500 $11.4 $5.700,00
1.000 $9.85 $9.850,00
ℹ️ Alle Preise sind in USD

68HC11 Übersicht

The Motorola 68HC11 (also written M68HC11 or HC11) is an 8-bit HCMOS single-chip microcontroller family introduced by Motorola Semiconductor in 1984 and now supported by NXP. The 68HC11 family combines an enhanced 6800/6801 instruction set with on-chip peripherals, 0 to 768 bytes of RAM, 0 to 20 Kbytes of ROM/EPROM, and 0 to 2048 bytes of EEPROM. Operating frequencies reach 3 MHz at 5 V, and low-voltage variants run from 3.0 V to 5.5 V. The architecture exposes 16-bit address and data buses through expanded-mode selection, supports asynchronous NRZ serial communications, and integrates an 8-channel 8-bit A/D converter on most members. The most common package for the original family is PLCC-52 (FN suffix), with QFP-64 and DIP variants also documented in the family datasheets.

Background: An 8-bit microcontroller (MCU) is a single-chip processor that integrates CPU core, program memory, working RAM, and peripheral interfaces onto one semiconductor substrate. The 68HC11 belongs to the HCMOS (high-density CMOS) MCU hierarchy (microcontroller -> 8-bit MCU -> HCMOS MCU -> Motorola 6800-derived family). Its design descended from the Motorola 6800 microprocessor via the 6801, adding CMOS power economy, on-chip EEPROM, and a richer peripheral set than the 6801/6805 predecessors.

Key features include 256 to 768 bytes of on-chip RAM with standby retention, up to 20 Kbytes of ROM, EPROM, or EEPROM, an 8-channel 8-bit ADC, a synchronous and asynchronous serial peripheral interface (SPI and SCI), a programmable timer with input capture/output compare, and power-saving STOP and WAIT modes. The M68HC11E family datasheet documents selectable memory configurations of 0/256/512/768 bytes RAM, 0/12/20 Kbytes ROM, and 0/512/2048 bytes EEPROM with block-protect security.

Technically, the 68HC11 uses a HCMOS process that delivers low power and high noise immunity. The chip supports both single-chip and expanded-multiplexed bus modes selected by the MODA/MODB pins on reset. Most variants include a non-multiplexed 8-bit port, a key feature that simplifies interfacing to memory-mapped peripherals versus pure 6800 designs.

Typical applications include automotive engine control units, barcode scanners, hotel lock systems, industrial control boards, hobby SBC/single-board-computers, and legacy embedded products that require deterministic 8-bit control with on-chip EEPROM. The 68HC11 was widely adopted where cost, integrated EEPROM, and a mature toolchain outweighed the need for higher clock rates.

Design consideration: Designers choosing the 68HC11 today must weigh legacy supply continuity against newer alternatives like the 68HCS12 or 68S12. For new designs, modern 8-bit or 32-bit MCUs generally offer better price/performance. For sustaining legacy products, third-party sources such as Tekmos TK68HC11 series provide pin-compatible ROM/Flash replacements, and the DF6811 IP core from DCD offers a fully binary-compatible drop-in for FPGA/ASIC SoC integration.

This page synthesizes distributor stock, datasheet references, and cross-brand drop-in alternatives not found in a single manufacturer datasheet - giving engineers a consolidated view of lifecycle options for the M68HC11 platform.

Drop-in-Alternativen für 68HC11 – gleiches Gehäuse, Pin-kompatibel. Bauteile mit anderem Gehäuse, die eine PCB-Überarbeitung erfordern, sind ausgeschlossen.

Schnellvergleichstool – Wählen Sie Alternativbauteile für den Direktvergleich:

MC68HC11E1CFNE3

✅ Drop-In
📦 PLCC-52 (FN)
same 68HC11 E-series, RAM doubled 256B -> 512B vs 68HC11A1, otherwise pin-to-pin

📋 Referenzalternative (nicht im Katalog)

MC68HC811E2FN

✅ Drop-In
📦 PLCC-52 (FN)
same E-series die, 2048 bytes EEPROM vs 512B, selectable EEPROM base address, otherwise pin-to-pin

📋 Referenzalternative (nicht im Katalog)

MC68HC11E0FU

✅ Drop-In
📦 QFP-64 (FU)
same E-series core, ROMless, 64-QFP (14x14) vs PLCC-52, same CPU/instruction set/ADC

📋 Referenzalternative (nicht im Katalog)

TK68HC11E20FN

✅ Drop-In
📦 PLCC-52 (FN)
third-party Flash replacement for E-series, same PLCC-52 footprint, 20K Flash vs 20K ROM

📋 Referenzalternative (nicht im Katalog)

TK68HC11F1FN

✅ Drop-In
📦 PLCC-52 (FN)
third-party Flash replacement for F-series, same PLCC-52 footprint, pin-to-pin with original MC68HC11F1

📋 Referenzalternative (nicht im Katalog)

DF6811E

✅ Drop-In
📦 IP Core (FPGA/ASIC)
binary-compatible 68HC11 IP core, fully instruction-set-compatible, integrated into FPGA/ASIC SoC

📋 Referenzalternative (nicht im Katalog)

68HC11 Grenzwerte & elektrische Eigenschaften

Architecture 8-bit HCMOS (6801/6800-derived)
Family M68HC11 (Motorola / Freescale / NXP)
Instruction Set Enhanced 6800/6801 (M6800/6801 upward compatible)
Operating Frequency Up to 3 MHz (at 5 V)
Supply Voltage (Standard) 5 V +/- 10%
Supply Voltage (Low-Voltage Variant) 3.0 V to 5.5 V
On-chip RAM 0 / 256 / 512 / 768 bytes (family dependent, retained in standby)
On-chip ROM/EPROM 0 / 12 / 20 Kbytes (variant dependent)
On-chip EEPROM 0 / 512 / 2048 bytes (with block protect on select variants)
ADC 8-channel, 8-bit (most variants)
Serial Interfaces Asynchronous NRZ SCI (UART) + Synchronous SPI
Timer Programmable timer with input capture / output compare / pulse accumulator
Operating Modes Single-chip, Expanded, Bootstrap, Test (selected via MODA/MODB)
Power-Saving Modes STOP and WAIT (data retained)
Common Package PLCC-52 (FN suffix); also DIP and QFP variants
Betriebstemperatur -40C to +85C / +105C / +125C (variant dependent)

68HC11 Pin-Konfiguration

Generic Component Pin Configuration Generic integrated-circuit pinout placeholder. Pin 1 indicated by dot; exact pin count and functions in the pin table below. 1 N 2 N-1 3 N-2 4 N-3 Pin Configuration See pin table below for pin functions Package-specific diagram not available
Pin 1 VSS — Ground reference (0 V)
Pin 2 MODB/IRQ — Mode select B / Interrupt request (shared, depends on mode)
Pin 3 MODA/LIR — Mode select A / Load instruction register (shared)
Pin 4 RESET — Active-low reset input
Pin 5 XIRQ — Non-maskable interrupt request
Pin 6 IRQ — Maskable interrupt request (alternate function in some modes)
Pin 7 PA7 — Port A bit 7 (digital I/O)
Pin 8 PA6 — Port A bit 6 (digital I/O)
Pin 9 PA5 — Port A bit 5 (digital I/O)
Pin 10 PA4 — Port A bit 4 (digital I/O)
Pin 11 PA3 — Port A bit 3 (digital I/O)
Pin 12 PA2 — Port A bit 2 (digital I/O)
Pin 13 PA1 — Port A bit 1 (digital I/O)
Pin 14 PA0 — Port A bit 0 (digital I/O)
Pin 15 VDD — +5 V supply (or 3.0 V for low-voltage variants)
Pin 16 XTAL — Crystal oscillator output / external clock input
Pin 17 EXTAL — External clock input / crystal connection
Pin 18 VDDR — VDD for reset / analog reference (variant dependent)
Pin 19 E — E clock output (system timing reference)
Pin 20 XCLK — External clock output (variant dependent)
Pin 21 PE0/RxD — Port E bit 0 / SCI receive data
Pin 22 PE1/TxD — Port E bit 1 / SCI transmit data
Pin 23 PE2/MISO — Port E bit 2 / SPI MISO
Pin 24 PE3/MOSI — Port E bit 3 / SPI MOSI
Pin 25 PE4/SCK — Port E bit 4 / SPI clock
Pin 26 PE5/SS — Port E bit 5 / SPI slave select
Pin 27 PE6 — Port E bit 6 (digital I/O)
Pin 28 PE7 — Port E bit 7 (digital I/O)
Pin 29 VRH — ADC high reference voltage
Pin 30 VRL — ADC low reference voltage
Pin 31 AN0/PE0 — ADC analog input 0 (channel dependent on variant)
Pin 32 AN1 — ADC analog input 1
Pin 33 AN2 — ADC analog input 2
Pin 34 AN3 — ADC analog input 3
Pin 35 AN4 — ADC analog input 4
Pin 36 AN5 — ADC analog input 5
Pin 37 AN6 — ADC analog input 6
Pin 38 AN7 — ADC analog input 7
Pin 39 PD0/RxD — Port D bit 0 (alternate SCI RxD on some variants)
Pin 40 PD1/TxD — Port D bit 1 (alternate SCI TxD on some variants)
Pin 41 PD2/MISO — Port D bit 2 / SPI MISO
Pin 42 PD3/MOSI — Port D bit 3 / SPI MOSI
Pin 43 PD4/SCK — Port D bit 4 / SPI clock
Pin 44 PD5/SS — Port D bit 5 / SPI slave select
Pin 45 PC0/ADDR0 — Port C bit 0 / multiplexed address bit 0 (expanded mode)
Pin 46 PC1/ADDR1 — Port C bit 1 / multiplexed address bit 1
Pin 47 PC2/ADDR2 — Port C bit 2 / multiplexed address bit 2
Pin 48 PC3/ADDR3 — Port C bit 3 / multiplexed address bit 3
Pin 49 PC4/ADDR4 — Port C bit 4 / multiplexed address bit 4
Pin 50 PC5/ADDR5 — Port C bit 5 / multiplexed address bit 5
Pin 51 PC6/ADDR6 — Port C bit 6 / multiplexed address bit 6
Pin 52 PC7/ADDR7/DATA — Port C bit 7 / multiplexed address bit 7 / multiplexed data bus

Typische Anwendungen

68HC11 ist geeignet für 6 Anwendungs: Automotive Engine Control Units, Barcode Scanner Embedded Controllers, Hotel Electronic Lock Systems, Industrial PLC and Motor Control, Legacy Embedded SBCs and Education Kits, Hobby and Retro-Computing Projects.

🚗

Automotive Engine Control Units

The 68HC11 family was designed for automotive ECU applications and remains the preferred 8-bit HCMOS controller for legacy engine and body control modules. Its on-chip 2048-byte block-protected EEPROM stores fuel maps, idle-speed trim, and VIN/CAL data without an external memory chip, while the 8-channel 8-bit ADC reads manifold pressure, throttle position, coolant temperature, and battery voltage. The 68HC11's STOP and WAIT low-power modes enable crank-sensing with sub-100 uA quiescent draw, critical for battery-during-crank scenarios. Combined with its 5 V supply tolerance, the part survives the harsh automotive electrical environment and meets the -40C to +125C automotive temperature grade.

🧩

Barcode Scanner Embedded Controllers

The 68HC11's combination of SCI (UART), SPI, and programmable timer with input capture makes it ideal for barcode scanner decoding controllers. The SCI interfaces to a host POS terminal at 9600 to 115200 baud, while SPI drives laser-diode or CCD sensor readout. The timer input capture pins time laser-scan mirror return pulses with microsecond resolution, and the 256 to 768-byte RAM buffers decode state while the 8-bit CPU runs firmware decode loops. The 68HC11's deterministic interrupt latency (8 to 12 cycles) ensures scan timing stays within scan-beam dwell constraints.

🔐

Hotel Electronic Lock Systems

The 68HC11's on-chip EEPROM (512 to 2048 bytes) and low-power WAIT/STOP modes made it the standard MCU for electronic hotel lock systems. The EEPROM stores the master access list, audit trail, and battery-failure flags without a backup battery, while the UART interfaces to the key-card reader (magstripe or RFID). The 68HC11's <1 mA STOP current allows 4 x AA alkaline cells to power the lock for 3 to 5 years. The -40C to +85C operating temperature covers hotel corridor and exterior door environments, and the HCMOS noise immunity rejects RF interference from card readers and electric strikes.

🏭

Industrial PLC and Motor Control

The 68HC11's 16-bit timer with pulse accumulator, PWM channels, and 8-channel ADC supports small PLC and motor-control applications. The programmable timer generates fixed-frequency PWM for DC motor speed control, while the ADC reads current shunt amplifiers and thermistor inputs. The 68HC11's HCMOS noise immunity and 5 V tolerance survive industrial factory-floor EMI. With 20 Kbytes of ROM it holds ladder-logic interpreter and PID control firmware. The expanded bus mode allows external program memory for PLCs that need >20K logic instructions.

🖥️

Legacy Embedded SBCs and Education Kits

The 68HC11 is the canonical MCU for educational single-board computers (SBCs) and legacy embedded training kits such as the Motorola EVB and Freescale M68EVB11. Its simple memory map, well-documented serial bootloader, and mature 6800/6801 instruction set make it ideal for teaching low-level embedded programming. SBC manufacturers continue sourcing 68HC11 through Rochester Electronics and Tekmos for ongoing product support. Combined with the 68HC11's debug-friendly Bootstrap mode, this educational role has persisted for 40+ years.

🔧

Hobby and Retro-Computing Projects

The 68HC11 powers a thriving retro-computing hobby community, including the QCard controller, HC11 SBC boards, and DIY calculator/computer projects. Its QFP-64 and DIP packages remain accessible to hobbyists soldering by hand, and its 6801/6800 instruction set is well documented in textbooks and online tutorials. Third-party Flash replacements like Tekmos TK68HC11 make hobby builds easier to program and re-flash. Combined with open-source assemblers, BASIC interpreters, and FORTH firmware ports, the 68HC11 continues to introduce new engineers to bare-metal 8-bit programming.

Zusammenfassung der empfohlenen Produkte

MC68HC11E1CFNE3 Active NXP 68HC11 variant, AEC-Q legacy automotive temperature grade Verwendet in: Automotive Engine Control Units MC68HC811E2FN 68HC11 variant with 2 KB EEPROM for fuel-map storage Verwendet in: Automotive Engine Control Units, Hotel Electronic Lock Systems MC68HC11A8 Classic 68HC11 variant with 8K ROM, 512B EEPROM, 256B RAM, ideal for scanner firmware Verwendet in: Barcode Scanner Embedded Controllers TK68HC11A20FN Tekmos Flash replacement, lower-cost firmware updates Verwendet in: Barcode Scanner Embedded Controllers MC68HC11E0FU ROMless 68HC11 variant for custom lock firmware Verwendet in: Hotel Electronic Lock Systems, Legacy Embedded SBCs and Education Kits, Hobby and Retro-Computing Projects MC68HC11E20FN 20 KB ROM variant for ladder-logic interpreter Verwendet in: Industrial PLC and Motor Control TK68HC11E20FN Tekmos Flash variant for field-updatable PLC firmware Verwendet in: Industrial PLC and Motor Control TK68HC11F1FN Tekmos Flash replacement enabling fast student firmware reload Verwendet in: Legacy Embedded SBCs and Education Kits TK68HC11A8FN Tekmos Flash replacement compatible with EVB-style development boards Verwendet in: Hobby and Retro-Computing Projects
What is the 68HC11 microcontroller?
The 68HC11 is an 8-bit HCMOS single-chip microcontroller introduced by Motorola Semiconductor in 1984, designed as an evolution of the Motorola 6800 microprocessor via the 6801. According to the M68HC11E datasheet from NXP, it integrates an enhanced 6800/6801 CPU with on-chip RAM (up to 768 bytes), ROM/EPROM (up to 20 Kbytes), and EEPROM (up to 2048 bytes), plus 8-channel 8-bit ADC, SCI (UART), SPI, and programmable timer. The family is widely used in automotive, industrial, and embedded applications and remains in production through NXP and third-party manufacturers.
How much RAM and ROM does the 68HC11 have?
The 68HC11 family offers configurable on-chip memory: 0, 256, 512, or 768 bytes of RAM (retained during standby), 0, 12, or 20 Kbytes of ROM or EPROM, and 0, 512, or 2048 bytes of EEPROM with block-protect security. The MC68HC811E2 variant specifically provides 2048 bytes of EEPROM with a selectable base address. Specific RAM/ROM/EEPROM sizes depend on the member device (e.g., MC68HC11A8 has 8K ROM, 512 bytes EEPROM, 256 bytes RAM per the MC68HC11A8 datasheet).
What is the maximum clock speed of the 68HC11?
The 68HC11 family operates at up to 3 MHz at 5 V supply, with low-voltage variants running from 3.0 V to 5.5 V. The internal bus frequency equals the external oscillator frequency (no on-chip PLL), so the 3 MHz bus speed directly limits instruction throughput. For higher performance the family recommends migrating to the 68HCS12 or modern ARM Cortex-M MCUs, which deliver 10x to 100x the throughput.
What packages does the 68HC11 come in?
The 68HC11 family is available in PLCC-52 (FN suffix), QFP-64, and DIP packages. The MC68HC11E0FU, for example, ships in 64-QFP (14x14) per its DigiKey listing. The PLCC-52 is now considered obsolete for some variants, with Tekmos offering 52-pin LQFP (PB package) as a drop-in board modification alternative that fits within the original PLCC footprint.
Is the 68HC11 still in production?
The original Motorola 68HC11 family is largely NXP/Freescale N/RND (Not Recommended for New Designs). Several specific devices such as MC68HC11E1CFNE3 remain available, and third-party manufacturers like Tekmos (TK68HC11 series) and DCD (DF6811 IP core) continue to supply pin-compatible replacements for the A, D, E, F, and K subseries. For new designs, NXP recommends migrating to the 68HCS12 or S12 platform.
Where can I buy a 68HC11 today?
The 68HC11 family can be purchased from authorized distributors (DigiKey, Mouser) for active variants such as MC68HC11E0FU and MC68HC11E1CFNE3, from Rochester Electronics for obsolete variants, and from third-party suppliers Tekmos (TK68HC11 A/D/E/F/K series) and DCD (DF6811 IP core). Lead times for active NXP parts are typically 6 to 12 weeks; obsolete parts may require franchise-only sourcing or third-party manufacturing. Prices as of 2026-10-11 start around USD 18.50 for qty-1.
What is the price of the 68HC11?
Pricing for the 68HC11 family varies by sub-series and package. As of 2026-10-11, qty-1 unit prices for active MC68HC11xxx devices typically range from USD 15 to USD 25, dropping to USD 9-12 at qty-1000. Older MC68HC811E2 variants may list higher. NXP's recommended replacement MC68HC11E1CFNE3 (successor to M68HC11A1 with doubled RAM) is currently stocked at major distributors. Tekmos TK68HC11 series pricing is quote-based.
What is the difference between 68HC11 and 68HC08?
The 68HC11 is more powerful and more expensive than the 68HC08 microcontroller, per the Motorola 68HC11 Wikipedia entry. The 68HC11 includes more peripherals, more memory options (including on-chip EEPROM), and a richer instruction set inherited from the 6801. The 68HC08 is a smaller, lower-cost, lower-power successor optimized for cost-sensitive applications. Both share the M68HCxx toolchain heritage but the 68HC11 remains preferred for automotive ECU and industrial control applications where EEPROM and expanded bus features are required.
What is a drop-in replacement for the 68HC11?
Tekmos manufactures drop-in replacements covering the 68HC11 A, D, E, F, and K series, providing both ROMless and Flash versions in PLCC-52, LQFP-52, and other original packages. For FPGA/ASIC SoC integration, DCD offers the DF6811 8-bit MCU IP core, fully binary-compatible with the Motorola 68HC11 instruction set and pin-compatible at the IP boundary. Freescale's recommended in-family replacement for the 68HC11A1 is the MC68HC11E1CFNE3 (only difference: RAM doubled from 256 to 512 bytes).
Can the 68HC11 be replaced with the 68HCS12?
Yes, the 68HCS12 is the official architectural successor to the 68HC11 for new designs, per NXP's community guidance. The 68HCS12 maintains instruction-set compatibility and adds higher clock speeds, more memory, and modern peripherals. However, the 68HCS12 is not a pin-compatible drop-in: PCB redesign is required. For true drop-in pin compatibility, stay within the 68HC11 family or use Tekmos TK68HC11 parts in the original PLCC-52 or LQFP-52 footprint.
Where to download the 68HC11 datasheet PDF?
The official M68HC11E family datasheet is hosted at https://www.nxp.com/docs/en/data-sheet/M68HC11E.pdf, and the MC68HC11A8 datasheet at https://www.nxp.com/docs/en/data-sheet/MC68HC11A8.pdf. Legacy Motorola datasheets are mirrored on alldatasheet.com and datasheet4u.com. For pinout-specific datasheets (e.g., MC68HC11E0FU PLCC-52 or 64-QFP), refer to the part-specific pages on DigiKey or Mouser. All datasheets are free to download from NXP without registration.
Where is the 68HC11 pinout diagram?
The 68HC11 pinout depends on the specific sub-series and package. For PLCC-52 (FN suffix), pin 1 is identified by the dot marker on the top of the package and the pinout is documented in the M68HC11E datasheet section on Package and Pinout. Common pin functions include VDD, VSS, XTAL, EXTAL, RESET, MODA/MODB, IRQ, XIRQ, ports A through E, and the ADC analog inputs. Refer to the family datasheet for the exact variant you are designing with, as pin functions vary by member device.
What is the difference between 68HC11A1 and 68HC11E1?
The MC68HC11A1 has 256 bytes of RAM, while the Freescale-recommended replacement MC68HC11E1CFNE3 has 512 bytes of RAM (doubled). Other peripherals, instruction set, and pinout are essentially identical. The 68HC11E1 also supports an expanded mode with external bus. For new designs the E1 variant is preferred for the doubled RAM and continued availability, while A1 is reserved for legacy compatibility.
What are the key specifications engineers should know about the 68HC11?
Engineers specifying the 68HC11 should know: 8-bit HCMOS CPU at up to 3 MHz, 5 V or 3.0 to 5.5 V supply, 256 to 768 bytes RAM, 0 to 20 Kbytes ROM, 0 to 2048 bytes EEPROM, 8-channel 8-bit ADC, SCI (UART), SPI, programmable timer, STOP/WAIT low-power modes, single-chip or expanded bus modes, and PLCC-52/QFP-64/DIP packages. Key engineering trade-offs are 8-bit throughput and obsolete PLCC-52 supply versus proven reliability, on-chip EEPROM, and mature tooling.
Is there an NXP equivalent for the 68HC11?
NXP inherited the 68HC11 portfolio from Freescale (which inherited it from Motorola) and continues to support several active variants. The direct in-family successor is the 68HCS12 (architectural successor, not pin-compatible). The active NXP-branded 68HC11 members include MC68HC11E0FU (64-QFP), MC68HC11E1CFNE3, and selected members of the A/E/F/K sub-series. For non-NXP drop-in alternatives, Tekmos TK68HC11 series covers A/D/E/F/K and DCD offers the DF6811 IP core for FPGA/ASIC integration.

Technische Referenzdaten für 68HC11 – Vergleich, Designhinweise und Compliance-Informationen.

Auswahlhilfe

Choose the original 68HC11 (M68HC11 family) when sustaining a legacy product where the existing firmware is binary and the PCB uses PLCC-52 or QFP-64. For new designs requiring 8-bit HCMOS 6801 compatibility but more RAM, choose the MC68HC11E1CFNE3 (512B RAM, 512B EEPROM, identical pinout to MC68HC11A1). For data-storage-heavy applications (ECU calibration, hotel lock audit trails), choose the MC68HC811E2FN (2 KB EEPROM with block protect). For PLCC-52 footprint with Flash reprogrammability (field updates), choose the Tekmos TK68HC11E20FN. For migrating to QFP-64 footprint, choose the MC68HC11E0FU ROMless variant. For new FPGA/ASIC designs that must run 68HC11 firmware, license the DCD DF6811 IP core. Avoid using 68HC11 for new greenfield designs unless 6801 binary compatibility is required; modern ARM Cortex-M or S08 MCUs offer better price/performance.

Vergleich mit Alternativen

Parameter Dieses Produkt MC68HC11E1CFNE3 MC68HC811E2FN MC68HC11E0FU TK68HC11E20FN TK68HC11F1FN DF6811E
Package PLCC-52 (FN) family PLCC-52 (FN) PLCC-52 (FN) QFP-64 (FU) PLCC-52 (FN) PLCC-52 (FN) IP Core (FPGA/ASIC)
Brand NXP Semiconductors NXP Semiconductors NXP Semiconductors NXP Semiconductors Tekmos Tekmos DCD
Architecture 8-bit HCMOS 6801/6800-derived 8-bit HCMOS 6801-derived 8-bit HCMOS 6801-derived 8-bit HCMOS 6801-derived 8-bit HCMOS 6801-derived 8-bit HCMOS 6801-derived 8-bit IP core, binary-compatible
On-chip RAM 256 / 512 / 768 bytes (variant dependent) 512 bytes 256 bytes 512 bytes (ROMless) 512 bytes 1024 bytes Configurable (IP)
On-chip ROM/Flash 0 / 12 / 20 Kbytes ROM 0 (ROMless) 0 (ROMless + 2KB EEPROM) 0 (ROMless) 20 Kbytes Flash Flash (F-series capacity) Configurable (IP)
On-chip EEPROM 0 / 512 / 2048 bytes 512 bytes 2048 bytes (with block protect) 512 bytes Configurable (Flash, no separate EEPROM) Configurable Configurable (IP)
Max Clock Frequency 3 MHz @ 5 V 3 MHz @ 5 V 3 MHz @ 5 V 3 MHz @ 5 V 3 MHz @ 5 V 3 MHz @ 5 V Configurable, up to 50 MHz in FPGA
Supply Voltage 5 V standard, 3.0 to 5.5 V low-voltage variant 5 V / 3.0-5.5 V 5 V 5 V 5 V / 3.0-5.5 V 5 V / 3.0-5.5 V IP core, FPGA supply
Manufacturer Status NXP (N/RND for new designs; selected variants active) NXP active NXP active NXP active (Rochester stocked) Tekmos (third-party replacement, ongoing) Tekmos (third-party replacement) DCD (FPGA/ASIC IP core)
Price (USD, qty-1 reference) USD 18.50 (family average) USD 19-22 USD 22-28 USD 17-21 Quote-based Quote-based License-based (IP core)

Wichtigste Unterscheidungsmerkmale

  • Authentic NXP 68HC11E-series with doubled RAM and continued manufacturer support (vs. MC68HC11A1 (legacy NXP device))
  • Larger 2 KB EEPROM with selectable base address for data storage (vs. MC68HC11E1CFNE3 (512 bytes EEPROM))
  • ROMless variant for QFP-64 footprint migration without firmware rewrite (vs. PLCC-52 ROMless variant)
  • Third-party Flash replacement enables field firmware updates vs masked ROM (vs. Original Motorola/NXP masked-ROM 68HC11E20)

Designhinweise

Do not assume the 68HC11 is a 5 V-only part. Low-voltage variants (3.0 to 5.5 V) are documented in the M68HC11E datasheet and require verifying the specific MPN suffix before PCB assembly. Power-rail decoupling must use a 100 nF ceramic plus 10 uF tantalum or ceramic bulk capacitor within 5 mm of the VDD/VSS pins. Without proper decoupling the HCMOS internal logic is susceptible to voltage transients that cause erratic resets.

PLCC-52 sockets are recommended over direct soldering for prototyping because PLCC packages are leadless and difficult to rework. The original PLCC-52 footprint is now considered obsolete for new designs; if laying out a new board, consider Tekmos LQFP-52 (PB package) which fits within the PLCC-52 land pattern and offers Flash reprogrammability. Place the external crystal within 5 mm of XTAL/EXTAL pins with guard traces to reduce noise injection.

The 68HC11 E clock output (E pin) generates a 50% duty cycle bus clock equal to one-fourth of the crystal frequency. In expanded mode this clock drives external memory and peripherals, so the E trace must be length-matched to the address/data bus to avoid setup/hold violations at 3 MHz. Place a 100 ohm series termination resistor at the E clock driver if the trace length exceeds 50 mm. Use Schmitt-trigger buffers on reset and IRQ lines to prevent false triggers from EMI.

At 3 MHz and 5 V supply, the 68HC11's typical quiescent current is 5 to 15 mA in RUN mode and <100 uA in STOP mode. Estimated: total power dissipation = Vdd * Idd = 5 V * 10 mA = 50 mW, well below thermal limits. However, at industrial temperature grade (-40C to +85C) the oscillator startup time after STOP wake can exceed 100 ms; verify the crystal startup spec at the lowest operating temperature to ensure reliable wake-up behavior.

Use the STOP and WAIT instructions aggressively for battery-powered designs. STOP halts the CPU and on-chip peripherals, retaining RAM and register contents with <100 uA draw; WAIT halts only the CPU while peripherals run, drawing 2 to 5 mA. Wake-up from STOP requires the IRQ, XIRQ, or RESET pin. For bootloader development, leverage the Bootstrap mode (set by holding MODA high and MODB low on reset) to load user code via SCI from a host PC.

Compliance-Informationen

RoHS
Unknown
REACH
Unknown
AEC-Q100
Not Qualified
Bleifrei
Unknown
Halogenfrei
Unknown
Konfliktmineralien
Compliant

Specific RoHS/REACH/AEC-Q100 compliance depends on the exact 68HC11 sub-variant MPN and production year. The legacy Motorola 68HC11 family predates RoHS (2006); many original parts are non-RoHS, while NXP-revised and Tekmos replacement variants may be RoHS compliant. Verify the specific MPN's compliance certificate before use in automotive or EU-market products.

Daten verifiziert am: 2026-10-11 – Daten geprüft und kuratiert vom Bauteil-Engineering-Team von XAIPART

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