PGA206UA - 5MHz FET-Input Programmable Gain In-Amp | TI
Teilenummer: PGA206UA ✓ Aktiv| Menge | Stückpreis | Gesamt |
|---|---|---|
| 1 | $12.6 | $12,60 |
| 10 | $11.34 | $113,40 |
| 100 | $10.08 | $1.008,00 |
| 500 | $9.2 | $4.600,00 |
| 1.000 | $8.4 | $8.400,00 |
PGA206UA Übersicht
A programmable gain instrumentation amplifier is a precision differential amplifier whose closed-loop gain is set by digital control inputs rather than external resistors. It sits within the amplifier hierarchy as an instrumentation amplifier -> precision op amp -> analog front-end (AFE) -> signal chain IC, combining a true three-architectural-input instrumentation amplifier front end with internally switched gain networks. PGAs are essential in data acquisition systems where a single amplifier must handle sensor signals spanning several orders of magnitude without manual range switching.
Key features include fast settling to 0.01% after a gain change, +/-40V input protection that survives overrange faults common in industrial field wiring, and a low maximum offset voltage of 1.5 mV. The FET input stage keeps bias current at 100 pA max, preserving accuracy with high-impedance sources such as pH probes, photodiodes, and piezoelectric sensors.
Technically, the PGA206 uses internally switched precision resistor networks controlled by two digital gain-select lines, a scheme the datasheet notes pairs naturally with an external logic latch to acquire gain data from a high-speed digital bus. Slew rate is 25 V/us and the supply range is +/-4.5V to +/-18V, allowing operation from standard +/-5V, +/-12V, or +/-15V analog rails. Operation is specified from -40C to +85C.
Typical applications include multi-range data acquisition front ends, programmable sensor interfaces, test and measurement instrumentation, and dynamic signal conditioning where gain must change on-the-fly between measurements.
Design consideration: total response time after a gain change equals the switching time plus the settling time to the new output voltage, so budget for settling in high-throughput scanning systems.
This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet.
Drop-in-Alternativen für PGA206UA – gleiches Gehäuse, Pin-kompatibel. Bauteile mit anderem Gehäuse, die eine PCB-Überarbeitung erfordern, sind ausgeschlossen.
Varianten dieser Serie
Modelle derselben Serie, die drop-in-kompatibel sind mit PGA206UA (gleiche Bauform und Footprint) – abweichend in Input Protection, Package.
Schnellvergleichstool – Wählen Sie Alternativbauteile für den Direktvergleich:
PGA207UA
✅ Drop-In✓ Auf Lager
$22.68 / Stück
Datenblatt ansehen →PGA206UAG4
✅ Drop-In📋 Referenzalternative (nicht im Katalog)
PGA204AU
✅ Drop-In📋 Referenzalternative (nicht im Katalog)
PGA206UA Grenzwerte & elektrische Eigenschaften
| Amplifier Type | Programmable Gain Instrumentation Amplifier |
| Number of Channels | 1 |
| Gains (Digitally Programmable) | 1, 2, 4, 8 V/V |
| Bandwidth | 5 MHz |
| Input Bias Current (Max) | 100 pA (FET input) |
| Input Offset Voltage (Max) | 1.5 mV |
| Slew Rate | 25 V/us |
| Supply Voltage Range | +/-4.5 V to +/-18 V |
| Input Protection | +/-40 V |
| Settling Accuracy | 0.01% |
| Betriebstemperaturbereich | -40C to +85C |
| Gehäuse | 16-SOIC (SOL-16) |
| Montageart | Surface Mount |
| Gain Control | 2-line digital gain select (latch-compatible) |
| Manufacturer | Texas Instruments (Burr-Brown) |
PGA206UA 16-soic (sol-16) Pinbelegungsleitfaden
Pinbelegung für PGA206UA (16-soic (sol-16)-Gehäuse). Dieses analoge Bauteil verfügt über Eingangs-, Ausgangs- und Versorgungspins. Offset-Null-, Kompensations- und Enable-Pin-Konfigurationen entnehmen Sie dem Herstellerdatenblatt. Ideal für Signalaufbereitung und Verstärkerschaltungen.
Keine detaillierten Pinbelegungsdaten verfügbar für PGA206UA.
Siehe die Datenblatt für die vollständige Pin-Konfiguration.
Typische Anwendungen
PGA206UA ist geeignet für 6 Anwendungs: Data Acquisition Front End, Programmable Sensor Interfaces, Test and Measurement Instrumentation, Industrial Process Control, Medical Instrumentation Front Ends, Automatic Test and Ranging Systems.
Data Acquisition Front End
The PGA206UA is purpose-built for data acquisition: the TI datasheet describes the PGA206/207 family as digitally programmable gain instrumentation amplifiers ideally suited for DAQ systems. Its 5 MHz bandwidth supports fast channel scanning, while the 100 pA maximum FET-input bias current preserves accuracy when multiplexing high-impedance sensor sources. The two-line digital gain control (1/2/4/8 V/V) can be latched from a high-speed digital bus, letting a controller re-range each channel between conversions. The 0.01% settling specification defines the per-gain-change latency that sets maximum scan rate; budget switching time plus settling time in the timing plan. The +/-40V input protection also tolerates wiring faults typical of distributed DAQ installations.
Empfohlen
Programmable Sensor Interfaces
Sensor outputs span orders of magnitude - load cells, photodiodes, and pH electrodes all benefit from software-selectable gain. The PGA206UA's FET input with 100 pA maximum bias current prevents loading of megohm-class sources, and its true instrumentation-amp input provides high common-mode rejection for bridge and differential sensors. Gain steps of 1, 2, 4, and 8 V/V let firmware normalize signal amplitude to the ADC input range automatically, improving effective resolution across the full sensor span. The 1.5 mV maximum offset must be referred to input and calibrated at the lowest gain; system-level offset nulling via MCU calibration is the standard mitigation. Operation from +/-5V to +/-15V dual rails matches typical industrial analog power schemes.
Empfohlen
Test and Measurement Instrumentation
Bench instruments, automated test equipment, and oscilloscope front ends require fast autoranging - exactly what the PGA206UA's 5 MHz bandwidth and 25 V/us slew rate deliver. The datasheet's recommended external logic latch allows gain codes to be acquired from a high-speed digital bus, enabling deterministic, sequencer-driven gain changes during automated sweeps. The 0.01% settling accuracy supports 12-bit-class measurement integrity after each range change. The +/-40V input protection stage is especially valuable in test equipment, where probes routinely encounter unexpected signal levels before ranging completes. Its 16-SOIC surface-mount footprint suits compact instrument modules while retaining the thermal and noise behavior of the Burr-Brown bipolar/JFET design.
Empfohlen
Industrial Process Control
In industrial control panels, transducer signals such as 4-20 mA derived voltages, pressure bridges, and thermocouple mV levels arrive with widely varying amplitude and common-mode content. The PGA206UA's instrumentation-amplifier input rejects common-mode noise, and its +/-40V input protection survives miswired field connections that would destroy unprotected amplifiers. Specified from -40C to +85C, it meets industrial enclosure temperature requirements. Gains of 1 to 8 V/V suit process sensors with relatively large outputs; for sub-millivolt thermocouple signals the higher-gain PGA207UA variant may fit better on the same footprint. The dual +/-4.5V to +/-18V supply range integrates with legacy +/-15V analog backplanes common in process control retrofits.
Empfohlen
Medical Instrumentation Front Ends
Diagnostic equipment such as patient-monitoring analog front ends benefits from the PGA206UA's FET input and programmable gain. The 100 pA maximum bias current minimizes DC errors with gel electrodes and high-impedance transducers, while digital gain ranging lets one analog channel capture both large and small biosignals without relay switching noise. The true instrumentation amplifier input structure provides the differential measurement and common-mode rejection required near noisy switching supplies. Design caution: for direct patient-connected applications, the +/-40V input protection helps with defibrillation-style transient resilience, but full IEC 60601 isolation must be provided elsewhere in the signal chain. Gain settling to 0.01% keeps multiplexed ECG/EEG scan timing predictable.
Empfohlen
Automatic Test and Ranging Systems
Autoranging measurement systems - DMM front ends, battery testers, and semiconductor parametric analyzers - need gain changes faster than electromechanical relays allow. The PGA206UA switches among gains of 1, 2, 4, and 8 V/V electronically with 0.01% settling, an order-of-magnitude faster and far more reliable than relay-based ranging. Its 5 MHz bandwidth keeps full-speed acquisition possible even at the highest gain. The datasheet's latch-based gain control pattern integrates cleanly with FPGA or MCU sequencers that coordinate range selection with ADC sampling. Because gain errors of the switched resistor network are factory-trimmed and repeatable, a single calibration table per gain step suffices over temperature within the -40C to +85C industrial range.
Empfohlen
Zusammenfassung der empfohlenen Produkte
Technische Referenzdaten für PGA206UA – Vergleich, Designhinweise und Compliance-Informationen.
Auswahlhilfe
Vergleich mit Alternativen
| Parameter | Dieses Produkt | PGA207UA | PGA206UAG4 | PGA204AU |
|---|---|---|---|---|
| Package | 16-SOIC (SOL-16) | 16-SOIC (SOL-16) - same | 16-SOIC (SOL-16) - same | 16-SOIC (SOL-16) - same |
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments |
| Gain Set | 1, 2, 4, 8 V/V | Higher gain set (PGA207 range) | 1, 2, 4, 8 V/V - identical | 1, 10, 100 V/V |
| Bandwidth | 5 MHz | 5 MHz class | 5 MHz - identical die | Lower speed family class |
Wichtigste Unterscheidungsmerkmale
- Balanced mid-gain range of 1/2/4/8 V/V (vs. PGA204AU)
- Faster, finer ranging than the high-gain sibling (vs. PGA207UA)
- RoHS build option without redesign (vs. PGA206UAG4)
Designhinweise
Per the TI PGA206/207 datasheet, total response time after a gain change equals the switching time plus the amplifier settling time to the new output voltage in the newly selected gain. In scanning DAQ systems, do not sample until the 0.01% settling criterion is met for the current gain and signal amplitude - large output steps at high gain take longer. The datasheet recommends an external logic latch on the gain-select lines when acquiring gain data from a high-speed digital bus, which also prevents gain-code glitches mid-conversion.
Supply the PGA206UA from well-decoupled dual rails within +/-4.5V to +/-18V. Place 0.1 uF ceramic capacitors directly at each supply pin plus bulk 10 uF per board. Because output swing depends on rail headroom, verify at the highest selected gain (8 V/V) that expected peak signals fit within the linear output range at your chosen rails - at +/-5V supplies, an 8x gain of a 1 Vrms source will clip. Ground-return the gain-control lines during power-up to avoid indeterminate gain states.
Two frequent mistakes: (1) relying on the amplifier's +/-40V input protection as routine overvoltage handling - it is a fault survival spec, not an operating mode; sustained overrange degrades FET input bias over life. (2) Ignoring the 1.5 mV maximum offset voltage at low gains: at G=1 this offset appears directly at the output, so calibrate or select the A-grade offset expectation accordingly. Also, the PGA206 is an older Burr-Brown architecture - for new zero-drift designs consider newer TI PGAs, accepting they are not footprint-compatible.
Compliance-Informationen
Compliance status not stated in captured data. A G4-suffix build (PGA206UAG4) exists, commonly denoting TI's RoHS-compliant version; verify on the TI product page before specifying.
