PGA207UA - 5MHz Programmable Gain Instrumentation Amp | TI
MPN: PGA207UA ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $35.53 | $35.53 |
| 10 | $32.8 | $328.00 |
| 100 | $29.9 | $2,990.00 |
| 500 | $26.5 | $13,250.00 |
| 1,000 | $22.68 | $22,680.00 |
Drop-in alternatives for PGA207UA — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
PGA206UA
✅ Drop-In✓ In Stock
$8.4 / Unit
View Datasheet →PGA204UA
✅ Drop-In📋 Reference alternative (not in catalog)
PGA205UA
✅ Drop-In ⚠️ 参数待验证📋 Reference alternative (not in catalog)
PGA207UA Maximum Ratings & Electrical Characteristics
| Amplifier Type | Programmable Gain Instrumentation Amplifier |
| Number of Circuits | 1 |
| Internal Amplifiers | 3 |
| Gain Settings | 1, 2, 5, 10 V/V (digitally programmable) |
| Bandwidth | 5 MHz |
| Slew Rate | 25 V/us |
| Input Bias Current | 100 pA max (FET input) |
| Input Offset Voltage | 1.5 mV max (laser-trimmed) |
| CMRR | 75 dB |
| Input Voltage Noise | 18 nV/sqrt(Hz) |
| Input Protection | +/-40 V (functional with supplies off) |
| Supply Voltage Range | +/-4.5 V to +/-18 V |
| Settling to 0.01% | Fast settling (digitally switchable between conversions) |
| Gain Control Interface | 2 address lines, CMOS/TTL compatible |
| Operating Temperature | -40C to +85C |
| Package | 16-SOIC (SOL-16, 0.295 in, 7.50 mm width) |
| Mounting Type | Surface Mount |
PGA207UA 16-soic (sol-16, 0.295 in, 7.50 mm width) Pin Configuration Guide
Complete pinout information for PGA207UA (16-soic (sol-16, 0.295 in, 7.50 mm width) package). This analog component features input, output, and power supply pins. Refer to the manufacturer datasheet for offset null, compensation, and enable pin configurations. Ideal for signal conditioning and amplifier circuits.
No detailed pinout data available for PGA207UA.
Refer to the datasheet for full pin configuration.
Safe Operating Area (SOA) & Thermal Characteristics
No official SOA curve available for this component. Always operate within absolute maximum ratings specified in the datasheet. Ensure adequate cooling and derate as needed.
Typical Applications
PGA207UA is suitable for 6 applications: Data Acquisition Front End, Industrial Process Control, Test and Measurement Instrumentation, Sensor Bridge and Transducer Amplification, Medical and Biomedical Signal Acquisition, Automatic Test Equipment (ATE).
Data Acquisition Front End
The PGA207UA is a natural fit for multiplexed data-acquisition systems whose input signal span is unknown until runtime. Its two CMOS/TTL address lines let a controller select gains of 1, 2, 5, or 10 V/V in under a microsecond, and the 0.01% fast-settling specification means the amplifier stabilizes between ADC conversions, eliminating dead time. The FET input stage draws only 100 pA max bias current, so high-impedance sources such as piezoelectric and pH probes are not loaded. Inputs tolerate +/-40V faults even with supplies off, protecting the front end during field wiring errors. Place the PGA207UA directly before a 12- to 16-bit ADC with a solid analog ground plane and low-impedance gain-line drivers.
Recommended
Industrial Process Control
In industrial control loops, sensor signals range from millivolt-level thermocouple outputs to several-volt transmitter outputs on the same channel. The PGA207UA's digitally programmable gain of 1 to 10 V/V lets one analog input condition this full span, while the +/-40V input protection survives miswired 24V field lines even with the card unpowered - a common real-world fault. Laser trimming keeps offset at 1.5 mV max, preserving accuracy at low gains, and the -40C to +85C industrial rating covers cabinet environments. Its 75 dB CMRR rejects ground-potential differences between field sensors and the controller. Use gain codes driven from the PLC backplane logic and place RC filtering ahead of the inputs for RF robustness.
Recommended
Test and Measurement Instrumentation
Bench instruments and automated test equipment benefit from the PGA207UA's 5 MHz bandwidth combined with autoranging gain control. A measurement system can implement coarse autoranging by switching gains of 1, 2, 5, and 10 - the classic decade sequence - keeping signals within the ADC's optimal range and maximizing resolution across four decades. The 25 V/us slew rate supports fast transient capture, and the FET-input 100 pA bias keeps loading negligible on high-impedance probe points. The 16-SOIC surface-mount package suits compact modular instrument architectures. Layout practice: keep the gain-switch address lines on a quiet logic layer, and shield the differential input traces to preserve the 75 dB CMRR at frequency.
Recommended
Sensor Bridge and Transducer Amplification
Strain-gauge bridges, load cells, and RTD conditioning circuits produce small differential signals superimposed on large common-mode voltages. The PGA207UA's true three-amplifier instrumentation topology with 75 dB CMRR extracts the differential signal while rejecting common-mode noise, and gain steps of 1 through 10 V/V accommodate bridges with different sensitivities on the same board design. The FET input's 100 pA max bias current minimizes bridge loading errors that plague bipolar-input amplifiers, and the 18 nV/sqrt(Hz) noise floor keeps small signals resolvable. Laser-trimmed offset of 1.5 mV max reduces calibration burden at low gains. Place the amplifier close to the bridge and use Kelvin connections for best accuracy.
Recommended
Medical and Biomedical Signal Acquisition
Biopotential and biomedical sensor channels - ECG front ends, optical sensor readouts, and lab analyzers - require high input impedance, low bias current, and selectable gain to handle signals from microvolts to volts. The PGA207UA's FET inputs (100 pA max) avoid electrode polarization artifacts, its +/-40V input protection provides defibrillation-style fault tolerance in the input network, and gain codes of 1/2/5/10 enable automatic range adjustment for different sensor types on one platform. The 5 MHz bandwidth is far beyond biopotential needs, giving ample margin for filtering. Designers should add patient-isolation and anti-aliasing filtering per applicable medical standards upstream and downstream of the amplifier stage.
Recommended
Automatic Test Equipment (ATE)
ATE pin electronics and measurement channels must cover wide voltage and impedance ranges with fast, repeatable range switching. The PGA207UA supports this with digital gain selection (1, 2, 5, 10 V/V) that settles to 0.01% quickly enough to switch between test steps without added dwell time, and its +/-40V input protection absorbs operator or fixture faults that would destroy unprotected amplifiers. The laser-trimmed offset and 75 dB CMRR maintain measurement repeatability, while the industrial -40C to +85C rating suits unconditioned rack environments. The 16-SOIC footprint integrates into dense channel cards. Recommended practice: drive the gain lines from latched logic and verify settling with the actual source impedance of your measurement path.
Recommended
Recommended Products Summary
Engineering reference data for PGA207UA — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | PGA206UA | PGA204UA | PGA205UA |
|---|---|---|---|---|
| Package | 16-SOIC (SOL-16, 7.50 mm) | 16-SOIC (SOL-16) - same | 16-SOIC (SOL-16) - same | 16-SOIC (SOL-16) - same |
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments |
| Bandwidth | 5 MHz | 5 MHz | [DATA_NEEDED] | [DATA_NEEDED] |
| Gain Settings | 1, 2, 5, 10 V/V | 1, 2, 4, 8 V/V | 1, 10, 100 V/V | [DATA_NEEDED] |
| Input Bias Current | 100 pA max (FET) | 100 pA max (FET) | [DATA_NEEDED] | [DATA_NEEDED] |
| Input Protection | +/-40 V | +/-40 V | [DATA_NEEDED] | [DATA_NEEDED] |
| Supply Range | +/-4.5 V to +/-18 V | +/-4.5 V to +/-18 V | [DATA_NEEDED] | [DATA_NEEDED] |
| Temperature Range | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C |
Key Differentiators
- Decimal gain ladder 1/2/5/10 simplifies calibration (vs PGA206UA)
- Input protection up to +/-40V with supplies off (vs PGA204UA)
- FET input with 100 pA max bias current (vs PGA205UA)
Design Notes
Route the two CMOS/TTL gain-select address lines on a quiet logic layer, physically separated from the differential input traces and the output. Gain switching injects charge transients; a series 100 ohm resistor at each address-line pin plus a local 0.1 uF decoupling capacitor suppresses coupling into the sensitive FET input stage. Maintain a solid ground plane under the SOIC-16 and use Kelvin grounding for the reference (REF) pin so gain accuracy is not degraded by IR drops.
Do not substitute PGA206UA for PGA207UA without updating system gain tables: the binary ladder (1/2/4/8) differs from the decimal ladder (1/2/5/10), and firmware that assumes decade gains will mis-scale readings by up to 25%. Similarly, PGA204UA reaches gain 100 - verify ADC full-scale headroom at the highest gain. Although inputs survive +/-40V, sustained overvoltage with supplies off still dissipates power in the internal protection network; limit fault duration in continuous-fault designs.
The +/-4.5V to +/-18V supply range covers +/-5V, +/-12V, and +/-15V rails, but note the output voltage swing scales with the rails chosen. Decouple each supply pin with 0.1 uF ceramic placed within a few millimeters, plus 4.7 uF bulk per rail. With a 5 MHz bandwidth and 25 V/us slew rate, supply-borne noise couples directly into the signal path - a linear regulator or well-filtered rail upstream preserves the 75 dB CMRR. Estimated: at +/-15V supplies and light loads, quiescent dissipation is modest, but verify junction temperature at high-output-load conditions in dense channel cards.
Compliance Information
Compliance status not explicitly stated in the retrieved web data; verify against the TI product page and distributor certificates for the specific date code.
